ASIC Design Engineer

Apple Inc

Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$147,400–$272,100 / yr
Posted
53 days ago

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $191k
This role $210k
$132k most similar roles pay here $287k

This role pays more than 68% of similar roles. Most pay $165,250–$216,250 — the shaded band above. At the midpoint, this role pays about $210k versus about $191k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1723 open roles on FindRole.

Listed pay typically runs $162,500–$272,100 across 1398 roles with salary data.

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At a glance

TL;DR · ASIC Design Engineer

Join our dynamic ASIC design team as an experienced engineer with a focus on developing cutting-edge memory subsystems and highly interconnected system architectures. In this role, you will conduct architecture research, work on RTL/micro-architecture, and contribute to the development of high-performance memory controllers and PHY designs. Your daily tasks include characterizing performance, conducting comparison studies, and documenting results. Ideal candidates possess expertise in DRAM controller design, DFI interface knowledge, and dram interface calibration algorithms. Additionally, you will collaborate with the performance team to create simulators, models, and test suites for evaluating system performance and power consumption. This position requires a Bachelor's degree plus at least three years of relevant experience, with a preference for those who can drive new memory system architectures from DRAM up and develop memory hierarchies for high-performance parallel computer systems.

What you'll do

  • Conduct architecture research for memory or highly interconnected system designs.
  • Develop RTL/micro-architecture for ASICs.
  • Design high-performance memory subsystems including DRAM controllers and PHY architectures.
  • Characterize system performance and document results for publication.
  • Collaborate on developing performance/power simulators and test suites.

What we're looking for

  • Bachelor's Degree with at least 3 years of ASIC design experience.
  • Experience in architecture research and development for memory or interconnected systems.
  • Proficiency in RTL/micro-architecture and high-performance memory subsystems.
  • Knowledge of DRAM controller, PHY architecture, DFI interface, and calibration/training mechanisms.
  • Ability to characterize system performance, conduct comparison studies, and document results.
  • Drive new memory system architectures from DRAM up for SOC designs.

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