ASIC Design Engineer

Nvidia

Confirmed live today Low trust

Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$116,000–$189,750 / yr
Employment
Full-time
Posted
71 days ago
Freshness
Confirmed live today
Nearby
99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $196k
This role $153k
$102k $244k
below market most similar roles pay here above market

This role pays less than 85% of similar roles. Most pay $167,900–$224,075 — the blue band above. At the midpoint, this role pays about $153k versus about $196k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1623 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 1110 roles with salary data.

Most-posted roles

View all roles at Nvidia

At a glance

TL;DR · ASIC Design Engineer

Role Posting Log in to save

As an ASIC Design Engineer, you will join a skilled engineering team to build powerful SoC and GPU products supporting consumer graphics, self-driving cars, and artificial intelligence. Your daily responsibilities include drafting microarchitecture documents, implementing high-performance, area, and power-efficient RTL to meet strict specifications, and delivering fully verified, synthesis and timing clean builds. You will collaborate with architects and verification teams on diverse IPs like engine schedulers, interrupt controllers, and time distribution systems. The role requires proficiency in Verilog for RTL development, logic synthesis, power, and timing analysis. Candidates should possess a degree in Electrical Engineering, Computer Engineering, or Computer Science, along with experience in Digital systems, VLSI design, and Computer Architecture. Technical skills in Perl, Python, C/C++, and asynchronous logic are also required.

What does a ASIC Design Engineer earn in California?

Median $214000 from 49 postings across 7 companies.

See salary data

Skills

RTL Design Verilog Microarchitecture Logic Synthesis Timing Analysis Python Perl C/C++ VLSI Design Digital Systems Computer Architecture ASIC Design SoC Post-Silicon Validation Front-end Flow

What you'll do

  • Draft microarchitecture documents and implement high-performance, area, and power-efficient RTL.
  • Analyze architectural trade-offs based on features, performance requirements, and power constraints.
  • Deliver fully verified, synthesis, and timing-clean builds for SoC and GPU products.
  • Develop specific IPs including time distribution systems, engine schedulers, and interrupt controllers.
  • Coordinate with architects and verification teams to deliver world-class RTL builds.
  • Assist the silicon bring-up team with debugging and post-silicon validation activities.

What we're looking for

  • BS/MS Degree or equivalent experience in Electrical Engineering, Computer Engineering, or Computer Science.
  • 2+ years of relevant RTL design work experience.
  • Strong skills in micro-architecture and RTL development using Verilog.
  • Proficiency in front-end flows including logic synthesis, power, and timing analysis.
  • Exposure to Digital systems and VLSI design, Computer Architecture, and Computer Arithmetic.
  • Strong coding skills in Perl, Python, or other industry-standard scripting languages.
  • Excellent interpersonal skills and a proven ability to work well in a team.
  • Strong C/C++ skills (preferred).

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