ASIC Design Engineer

Nvidia

Confirmed live 2 days ago Trusted

Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$116,000–$189,750 / yr
Posted
25 days ago
Freshness
Confirmed live 2 days ago
Nearby
99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $192k
This role $153k
$103k most similar roles pay here $241k

This role pays less than 82% of similar roles. Most pay $162,000–$221,050 — the shaded band above. At the midpoint, this role pays about $153k versus about $192k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 896 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 876 roles with salary data.

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View all roles at Nvidia

At a glance

TL;DR · ASIC Design Engineer

Role Posting Log in to save

As an ASIC Design Engineer, you will join a skilled engineering team to build powerful SoC and GPU products that support consumer graphics, self-driving cars, and artificial intelligence. Your daily responsibilities include drafting microarchitecture documents, implementing high-performance, area-efficient RTL to meet strict specifications, and analyzing architectural trade-offs regarding performance and power constraints. You will collaborate with architects and verification teams to deliver synthesis and timing clean builds for various IPs like engine schedulers and interrupt controllers. The role requires expertise in Verilog, logic synthesis, and front-end flows, alongside proficiency in Perl or Python scripting. Candidates should possess a strong understanding of computer architecture, VLSI design, and digital systems. Additional strengths include C/C++ skills, experience with multi-clock domains, asynchronous logic, and various interface protocols to solve complex hardware engineering challenges.

What does a ASIC Design Engineer earn in California?

Median $214000 from 47 postings across 8 companies.

See salary data

Skills

RTL Verilog Microarchitecture VLSI Design Logic Synthesis Timing Analysis Python Perl C C++ SoC GPU Digital Systems Computer Architecture Post-Silicon Validation ASIC Design

What you'll do

  • Draft microarchitecture documents and implement high-performance, area-efficient RTL to meet specific development targets.
  • Analyze architectural trade-offs based on features, performance requirements, and power constraints.
  • Deliver fully verified, synthesis and timing clean builds for SoC and GPU products.
  • Develop a diverse range of IPs including time distribution systems, engine schedulers, and interrupt controllers.
  • Perform front-end flows including logic synthesis, power analysis, and timing analysis.
  • Assist the silicon bring-up team with debugging and post-silicon validation activities.
  • Utilize scripting languages like Perl or Python to support design and development workflows.

What we're looking for

  • BS/MS degree in Electrical Engineering, Computer Engineering, or Computer Science (or equivalent experience).
  • 2+ years of relevant RTL design work experience.
  • Proficiency in micro-architecture and RTL development using Verilog.
  • Experience with front-end flows including logic synthesis, power, and timing analysis.
  • Knowledge of Digital systems, VLSI design, Computer Architecture, and Computer Arithmetic.
  • Strong coding skills in Perl, Python, or other industry-standard scripting languages.
  • Excellent interpersonal skills and the ability to work well in a team environment.
  • Experience with multi-clock domains, asynchronous logic, interface protocols, and arbitration schemes.

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