ASIC Design Engineer

Apple Inc

Confirmed live 2 days ago Trusted

Quick summary

Work type: On-site
Location: Santa Clara, CA
Salary: $129,300–$194,700 / yr
Posted: 119 days ago
Freshness: Confirmed live 2 days ago
Nearby: 99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $192k

This role $162k

$117k most similar roles pay here $242k

This role pays less than 74% of similar roles. Most pay $162,000–$223,000 — the shaded band above. At the midpoint, this role pays about $162k versus about $192k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1984 open roles on FindRole.

Listed pay typically runs $175,000–$277,600 across 1590 roles with salary data.

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At a glance

TL;DR · ASIC Design Engineer

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As an ASIC Design Engineer, you will join a complex team focused on crafting upcoming products and transforming hardware technology. Your daily responsibilities involve architecture research and development of memory or highly interconnected system architectures, as well as RTL and micro-architecture work. You will drive new memory system architectures from DRAM up, exploring critical trade-offs in system performance, area, and power consumption. The role involves developing memory hierarchies for high-performance parallel computer architectures, specifically system-on-a-chip designs. Additionally, you will collaborate with the performance team to develop simulators, models, and test suites while characterizing performance through comparison studies and documentation. Key technical areas include high-performance memory subsystems, including DRAM controllers, PHY architecture, DFI interfaces, and calibration/training mechanisms. You will solve complex problems related to hardware integration and advanced memory subsystem design.

What does a ASIC Design Engineer earn in California?

Median $214000 from 47 postings across 8 companies.

See salary data

Skills

ASIC Design RTL Micro-architecture SoC DRAM PHY DFI Simulators System Architecture

What you'll do

Research and develop memory or highly interconnected system architectures.
Design RTL and micro-architecture for ASIC components.
Develop high-performance memory subsystems including DRAM controllers and PHY architectures.
Implement DFI interfaces and DRAM interface calibration/training mechanisms.
Drive new memory system architectures from the DRAM level upward.
Analyze trade-offs between system performance, area, and power consumption.
Design memory hierarchies for high-performance parallel computer architectures and SoCs.
Develop performance/power simulators, models, and test suites in coordination with the performance team.

What we're looking for

Bachelor's Degree is required.
Experience in ASIC design and RTL/micro-architecture is required.
Experience in architecture research or development of memory or highly interconnected system architectures is required.
Knowledge of high-performance memory subsystems, including DRAM controllers and PHY architecture, is a plus.
Experience in characterizing performance, conducting comparison studies, and documenting results is required.
Ability to drive new memory system architectures from DRAM up is preferred.
Ability to explore trade-offs in system performance, area, and power consumption is preferred.
Experience developing memory hierarchies for high-performance parallel computer architectures (SoC) is preferred.