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Active Keyword: SOC Verification Remove filter Clear all

20 of up to 20 (filtered)

SOC Design Verification Engineer

Apple Inc

Sunnyvale, CA 11 days ago $129,300–$225,300
Actively hiring Confirmed live today Trusted Competitive pay
SystemVerilog UVM Verilog UPF Python C C++ Formal Verification JasperGold PCIe AXI AHB SVA ASIC SOC Perl Assembly
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SOC Design Verification Engineer

Apple Inc

San Diego, CA 11 days ago $122,700–$214,300
Actively hiring Confirmed live yesterday Trusted Below market
SystemVerilog UVM Verilog UPF Python C C++ Formal Verification JasperGold PCIe AXI AHB SVA RTL ASIC SOC WiFi Bluetooth Perl
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SOC Design Verification Engineer

Apple Inc

Irvine, CA 11 days ago $122,700–$214,300
Actively hiring Confirmed live yesterday Trusted Below market
SystemVerilog UVM Verilog UPF Python C++ Perl Formal Verification JasperGold SVA PCIe AXI AHB WiFi Bluetooth RTL Verification AI/ML
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SOC Design Verification Engineer

Apple Inc

Sunnyvale, CA 11 days ago $184,700–$324,800
Actively hiring Confirmed live today Trusted Above market
SystemVerilog UVM Verilog UPF Python C C++ Formal Verification JasperGold PCIe AXI AHB SVA Perl RTL ASIC SOC WiFi Bluetooth
10+ yrs exp
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SOC Design Verification Engineer

Apple Inc

San Diego, CA 11 days ago $175,000–$308,500
Actively hiring Confirmed live today Trusted Above market
SystemVerilog UVM Verilog UPF Python C++ Perl Formal Verification JasperGold SVA PCIe AXI AHB WiFi Bluetooth RTL Verification AI/ML Assembly
10+ yrs exp
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SOC Design Verification Engineer

Apple Inc

Irvine, CA 11 days ago $175,000–$308,500
Actively hiring Confirmed live today Trusted Above market
SystemVerilog UVM Verilog UPF Python C++ Perl Formal Verification JasperGold SVA ASIC SOC PCIe AXI AHB WiFi Bluetooth AI/ML
10+ yrs exp
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Senior Performance Verification Engineer, SoC

Microsoft

19 days ago $119,800–$234,700
Actively hiring Confirmed live yesterday Trusted Competitive pay
SoC Verification System Verilog UVM C/C++ Computer Architecture ARM Emulation Firmware SoC Design Performance Verification
5+ yrs exp Hybrid
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SOC Design Verification Engineer

Qualcomm

San Diego, CA 20 days ago $101,400–$152,200
Actively hiring Confirmed live today Trusted Below market
ASIC RTL to GDS Flow Virtuoso System Simulation Synthesis Place and Route Design Verification Scripting Logic Design
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SOC Design Verification Engineer

Qualcomm

San Diego, CA 21 days ago $121,800–$182,600
Actively hiring Confirmed live today Trusted Below market
System Verilog UVM C Assertion-Based Verification (SVA) Coverage-Driven Verification Python Formal Verification Portable Stimulus (PSS) PCIe CXL DDR HBM Ethernet Veloce Palladium ZeBu RTL SoC Architecture AI/ML Accelerators
2+ yrs exp
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Senior Verification Engineer, SoC

Nvidia

Santa Clara, CA +3 21 days ago $136,000–$218,500
Actively hiring Confirmed live today Trusted Competitive pay
System Verilog UVM C++ Object-Oriented Programming ASIC Verification SoC Architecture CPU Verification RTL FPGA Emulation
5+ yrs exp Hybrid
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SOC Design Verification Engineer

Qualcomm

San Diego, CA 25 days ago $101,400–$152,200
Actively hiring Confirmed live yesterday Trusted Below market
ASIC RTL to GDS Flow Virtuoso System Simulation Synthesis Place and Route Design Verification Scripting
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GSoC Design Verification Engineer

Qualcomm

San Diego, CA 34 days ago $101,400–$152,200
Actively hiring Confirmed live today High trust Below market
System Verilog UVM C Assertion-Based Verification (SVA) Python Coverage-Driven Verification RTL Formal Verification Portable Stimulus (PSS) LLM RAG PCIe Ethernet DDR HBM Veloce Palladium ZeBu Cache Coherency ACE CHI CXL
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Wireless SOC Verification Engineer

Apple Inc

Sunnyvale, CA 40 days ago $184,700–$324,800
Actively hiring Confirmed live today Trusted Above market
SystemVerilog UVM ASIC SOC RTL Verification UPF PCIe AXI AHB Formal Verification DMA DDR USB Power Management NOC Bus Fabric FW-HW Interaction Coverage Driven Verification Tape-out Multi-processor Systems
10+ yrs exp
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Wireless SOC Verification Engineer

Apple Inc

San Diego, CA 40 days ago $175,000–$308,500
Actively hiring Confirmed live today Trusted Above market
SystemVerilog UVM ASIC SOC RTL Verification UPF PCIe AXI AHB Formal Verification DMA DDR Memory Controller Bus Fabric NOC Power Management low power design HW/FW Interaction
10+ yrs exp
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Wireless SOC Verification Engineer

Apple Inc

Irvine, CA 40 days ago $175,000–$308,500
Actively hiring Confirmed live today Trusted Above market
SystemVerilog UVM ASIC SOC RTL Verification UPF PCIe AXI AHB Formal Verification DMA DDR Memory Controller low power design Bus Fabric NOC FW-HW Interaction Coverage Driven Verification Tape-out
10+ yrs exp
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SOC Design Verification Engineer-Staff

Qualcomm

San Diego, CA 40 days ago $145,600–$218,400
Actively hiring Confirmed live today Trusted Competitive pay
ASIC Design RTL to GDS Flow Virtuoso System Simulation Synthesis Place and Route Design Verification Scripting SoC
4+ yrs exp
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SOC Design Verification Engineer

Qualcomm

San Diego, CA 40 days ago $121,800–$182,600
Actively hiring Confirmed live today Trusted Below market
System Verilog UVM C Assertion-Based Verification (SVA) Coverage-Driven Verification Python Portable Stimulus (PSS) Formal Verification PCIe CXL DDR HBM Ethernet Veloce Palladium ZeBu RTL SoC Architecture AI/ML Accelerators
2+ yrs exp
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SOC Design Verification Engineer

Qualcomm

San Diego, CA 40 days ago $101,400–$152,200
Actively hiring Confirmed live yesterday Low trust Below market
ASIC RTL to GDS Flow Virtuoso System Simulation Synthesis Place and Route Design Verification Scripting Logic Design
Save

SOC Design Verification Engineer-Staff

Qualcomm

San Diego, CA 40 days ago $145,600–$218,400
Actively hiring Confirmed live today Trusted Competitive pay
ASIC Design RTL to GDS Flow Virtuoso System Simulation Synthesis Place and Route Design Verification Scripting SoC IC Package
4+ yrs exp
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SOC Verification and Methodology Engineer, Staff

Qualcomm

San Diego, CA 40 days ago $145,600–$218,400
Actively hiring Confirmed live yesterday Trusted Competitive pay
ASIC Design RTL to GDS Flow Virtuoso System Simulation Synthesis Place and Route Design Verification Scripting
4+ yrs exp
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