Wireless SOC Verification Engineer

Apple Inc

Confirmed live today Trusted

Quick summary

Work type: On-site
Location: San Diego, CA
Salary: $175,000–$308,500 / yr
Posted: 17 days ago
Freshness: Confirmed live today
Nearby: 99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $205k

This role $242k

$123k most similar roles pay here $328k

This role pays more than 85% of similar roles. Most pay $168,500–$241,750 — the shaded band above. At the midpoint, this role pays about $242k versus about $205k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3587 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2768 roles with salary data.

Most-posted roles

View all roles at Apple Inc

At a glance

TL;DR · Wireless SOC Verification Engineer

Role Posting Log in to save

As a Wireless SOC Verification Engineer, you will join the Wireless SOC team to verify complex systems and ensure tape-out readiness for high-performance wireless chips. You will be responsible for pre-silicon RTL verification of both blocks and top-level SOCs, focusing on high-speed layered protocols, low-power architectures, and firmware-hardware interactions. Your daily work involves creating coverage-driven verification plans from specifications, architecting highly reusable UVM testbenches, and integrating complex multi-instance VIPs and sub-system test suites. You will also manage power management designs using UPF simulations and verify components like PCIe, memory controllers, and bus fabrics. To succeed, you must possess expertise in SystemVerilog and the UVM methodology while navigating the complexities of multi-chip SOC debug architectures to meet demanding wireless protocol requirements within a dynamic, multi-functional engineering environment.

Skills

SystemVerilog UVM ASIC SOC RTL Verification UPF PCIe AXI AHB NoC Formal Verification low power design DMA DDR USB Coverage Driven Verification Tape-out

What you'll do

Create coverage-driven verification plans from technical specifications to meet defined coverage targets.
Architect highly reusable UVM-based testbenches and integrate complex multi-instance VIPs into the SOC level.
Perform pre-silicon RTL verification for both individual blocks and top-level SOC designs.
Execute power management verifications using low-power methodologies and UPF simulations.
Verify high-speed layered protocols, including PCIe, memory controllers, and various bus architectures.
Debug complex multi-chip SOC architectures and firmware-hardware interactions.
Collaborate with cross-functional teams to integrate and verify overall SOC designs for tape-out readiness.

What we're looking for

Bachelor of Science degree and at least 10 years of relevant industry experience.
Proven track record of working a full ASIC cycle from concept to tape-out and bring-up.
Expertise in SystemVerilog coding and UVM methodology.
Experience taping out large SOC systems with embedded processor cores (preferred).
Hands-on verification experience of PCIe, Bus Fabric, NOC, AHB, and AXI based bus architecture in a UVM environment (preferred).
Experience with Formal Verification (preferred).
In-depth knowledge of low power design, UPF integration, boot-up, and HW/FW interaction verification (preferred).
Excellent communication and problem-solving skills (preferred).

Similar roles

Wireless SOC Verification Engineer

Apple Inc

Irvine, CA 17 days ago $175,000–$308,500

SystemVerilog UVM ASIC SOC PCIe UPF Formal Verification RTL DMA DDR USB AHB AXI NoC Power Management coverage driven verification Bluetooth

10+ yrs exp

Save

Wireless SOC Verification Engineer

Apple Inc

Sunnyvale, CA 17 days ago $184,700–$324,800

SystemVerilog UVM ASIC SOC PCIe UPF Formal Verification RTL DMA DDR USB AHB AXI NoC Power Management low power design Coverage Driven Verification

10+ yrs exp

Save

Wireless SOC Verification Engineer

Apple Inc

San Diego, CA 114 days ago $122,700–$214,300

SystemVerilog UVM Verilog RTL Verification Formal Verification UPF PCIe DMA DDR USB SOC Design Coverage Driven Verification Wireless Protocols

Save

Wireless SOC Verification Engineer

Apple Inc

Sunnyvale, CA 114 days ago $129,300–$225,300

SystemVerilog UVM Verilog RTL Verification Formal Verification UPF PCIe DDR USB SOC Coverage Driven Verification Multi-processor Systems Memory Controller Subsystems

Save

Wireless SOC Verification Engineer

Apple Inc

Irvine, CA 114 days ago $122,700–$214,300

UVM SystemVerilog Verilog RTL Verification Formal Verification UPF PCIe DMA DDR USB SOC Architecture coverage driven verification Multi-Processor Systems

Save

Wireless Design Verification Engineer

Apple Inc

San Diego, CA 17 days ago $175,000–$308,500

SystemVerilog UVM ASIC Verification Python Functional Coverage Assertion-Based Verification DPI Bus Functional Models Transaction-Level Modeling Formal Verification Low-Power Methodologies Regression Infrastructure Verification IP SOC / integration

10+ yrs exp

Save