SOC Design Verification Engineer
Qualcomm
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Market check
How this pay compares to similar roles
This role pays less than 98% of similar roles. Most pay $168,500–$229,100 — the blue band above. At the midpoint, this role pays about $127k versus about $199k for comparable roles.
Based on 240 similar postings.
Employer
Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.
Qualcomm currently has 575 open roles on FindRole.
Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.
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At a glance
The SOC Design Verification Engineer joins the ASICS Engineering group to support the development of high performance, high quality, and low power products. Working under supervision, the engineer assists in defining, modeling, designing, optimizing, verifying, validating, implementing, and documenting IP block and SoC development. Daily responsibilities include creating architectures, circuit specifications, logic designs, and system simulations based on system-level requirements. The role involves evaluating process flows from high-level design to synthesis, place and route, and timing and power use. Candidates must utilize architecture and design tools, scripting tools, and programming languages, specifically using applications like RTL to GDS Flow and Virtuoso. The position requires technical documentation for EDA, IP, and ASIC projects to solve complex hardware integration and design verification problems.
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