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Machine Learning Artificial Intelligence C++ Python PyTorch TensorFlow JAX Computer Architecture Network Architecture Hardware/Software Co-design Simulation Analytical Modeling HLS Traffic Engineering +9 more Show less

QA Methodologies Test Design Python Linux Windows Network Switch Configuration VLAN Release Management E2E Testing Scripting +5 more Show less

Machine Learning HPC Molecular Dynamics Kinetic Monte Carlo Ab initio Quantum Chemistry Simulation Scientific Computing Modeling Frameworks Atomic Layer Etching Plasma Etching +5 more Show less

Artificial Intelligence Machine Learning Physics-Informed Neural Networks (PINNs) Data Pipelines Computational Science Simulation Control Systems Statistical Modeling Metrology Computer-Aided Engineering (CAE) +5 more Show less

Robotics Data Analytics Predictive Maintenance Program Management KPI Metrics Semiconductor Equipment Troubleshooting +2 more Show less

Computer Architecture VLSI Design Digital Logic Design Python Pandas NumPy PyTorch Machine Learning DVFS High-Performance Computing GenAI Power Analysis +7 more Show less

Linux Python C C++ Java Go Bash Kubernetes Slurm HPC Distributed Systems Networking Storage Firmware Telemetry Automation +11 more Show less

ASIC Floorplan VLSI Computer Architecture Verilog System Verilog Python Perl C/C++ CAD Physical Design Timing Closure Clock Distribution Packaging +8 more Show less

ERP Excel Data Analytics Supply Chain Management Project Management MRP Six Sigma APICS CPIM APICS CSCP PMP NPI Manufacturing +7 more Show less

Verilog SystemVerilog Python Perl RTL ASIC Mixed-Signal Design DFT Waveform Debug Digital Design Logic Design PLL High-Speed Interconnects Simulation Verification +10 more Show less

Machine Learning Python C++ Computer Architecture ASIC Design Verilog Statistical Modeling RTL Simulation Power Modeling Silicon Platforms Low Power Design GPU Design Tegra SoC +8 more Show less

ASIC Physical Design Logic Synthesis Formal Verification Equivalence Checking RTL Timing Closure Clock Domain Crossing MTBF Analysis Synopsys Cadence Python TCL Perl Make EDA Tools Netlisting ECO Generation +12 more Show less

UVM C++ C Python Perl ASIC Design Computer Architecture Memory Models VCS Emulation FPGA Post-silicon Verification +7 more Show less

Static Timing Analysis STA ASIC Physical Design Synthesis Floor-planning CTS Routing Equivalence Checking Timing Constraints Power Convergence ECO AI LLM +9 more Show less

C++ VLSI Physical Design Machine Learning Graph Neural Networks Python Tcl Perl ICC2 Innovus PrimeTime Tempus StarRC Multithreading Distributed Computing Parallel Computing EDA Tools +12 more Show less

RTL Verilog Python Machine Learning Artificial Intelligence Power Analysis VLSI Logic Synthesis place‑and‑route PowerArtist PrimeTime PX Digital Design +7 more Show less

Verilog RTL Design ASIC Design Flow Logic Synthesis Timing Closure Computer Architecture Cache Coherency high speed interconnects DFT Floor-planning ECO Lab Debug Verification +8 more Show less

LLVM C++ C CUDA PTX OpenCL Fortran OpenGL Vulkan Compiler Design Instruction Scheduling Software Pipelining Register Allocation TableGen Machine IR LLVM IR Parallel Computing SIMT +13 more Show less

RTL Verilog ASIC Design VLSI Micro-architecture Logic Synthesis Timing Analysis C++ Python Perl Computer Architecture Digital Systems Bus Protocols Interconnect Networks DMA Engines +10 more Show less

System Verilog Verilog C++ Python Perl VCS Verdi Debussy GDB Emulation Prototyping RTL VLSI Digital Design Computer Architecture PCIe Memory Protocols +12 more Show less