ASIC Design Engineer

Nvidia

Confirmed live 2 days ago High trust

Quick summary

Work type: On-site
Location: Santa Clara, CA
Salary: $100,000–$166,750 / yr
Posted: 56 days ago
Freshness: Confirmed live 2 days ago
Nearby: 99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $185k

This role $133k

$86k most similar roles pay here $233k

This role pays less than 90% of similar roles. Most pay $152,875–$216,250 — the shaded band above. At the midpoint, this role pays about $133k versus about $185k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 896 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 876 roles with salary data.

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View all roles at Nvidia

At a glance

TL;DR · ASIC Design Engineer

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As an ASIC Design Engineer - New College Grad 2026, you will join the CPU Logic Design Team to focus on the micro-architectural definition, RTL coding, logic debug, synthesis, and timing closure for critical components including the on-chip interconnect network, coherency, and last-level caches. You will be responsible for crafting and delivering specific chip units by writing high performance and low power RTL while collaborating with verification and implementation teams to meet area, performance, and power goals. The role requires a strong background in computer architecture, cache coherency, or high speed interconnects. Candidates must possess Verilog expertise and a deep understanding of the ASIC design flow, including logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, and lab debug. This position addresses technical challenges within processor and high performance semiconductor designs.

What does a ASIC Design Engineer earn in California?

Median $214000 from 47 postings across 8 companies.

See salary data

Skills

Verilog RTL Design ASIC Design Flow Logic Synthesis Timing Closure Computer Architecture Cache Coherency high speed interconnects DFT Floor-planning ECO Lab Debug Verification

What you'll do

Define micro-architectures for on-chip interconnect networks, coherency, and last-level caches.
Write high-performance and low-power RTL code for specific chip units.
Perform logic synthesis and achieve timing closure for super units.
Create comprehensive design documentation for assigned components.
Partner with the verification team to ensure the functional correctness of your unit.
Work with implementation teams to meet area, performance, and power goals.
Debug logic issues during the prototyping and lab bring-up phases.

What we're looking for

A BS or MS degree in Electrical Engineering, Computer Engineering, or Computer Science is required.
Experience in processor or other related high-performance semiconductor designs is required.
Expertise in Verilog is required for RTL coding and design.
A deep understanding of the ASIC design flow including synthesis, timing analysis, floor-planning, and lab debug is required.
Strong knowledge of computer architecture, cache coherency, or high-speed interconnects is required.
Effective communication and interpersonal skills are required to work in a global team.
Experience mentoring junior engineers and interns is preferred.

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