ASIC Design Engineer

Nvidia

Confirmed live today Low trust

Quick summary

Work type: On-site
Location: Santa Clara, CA
Salary: $100,000–$166,750 / yr
Employment: Full-time
Posted: 110 days ago
Freshness: Confirmed live today
Nearby: 99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $183k

This role $133k

$86k $233k

below market most similar roles pay here above market

This role pays less than 87% of similar roles. Most pay $152,875–$214,000 — the blue band above. At the midpoint, this role pays about $133k versus about $183k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1623 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 1110 roles with salary data.

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View all roles at Nvidia

At a glance

TL;DR · ASIC Design Engineer

Role Posting Log in to save

As an ASIC Design Engineer - New College Grad 2026, you will join the GPU Design team to implement high performance, area and power efficient RTL for leading SoCs and GPUs. Your daily responsibilities include crafting micro-architecture, implementing RTL, and delivering fully verified, synthesis and timing clean designs. You will analyze architectural trade-offs, collaborate with cross-functional teams, and work on various IPs like work schedulers, time distribution systems, interrupt controllers, and DMA engines. The role requires proficiency in Verilog, micro-architecture, and the ASIC design flow, including logic synthesis and timing analysis. Candidates should possess knowledge of Digital systems, VLSI design, Computer Architecture, and Computer Arithmetic. Additional skills in C/C++, Python, Perl, and experience with arbiters, scheduling, synchronization, and bus protocols are highly valued for this technical position.

What does a ASIC Design Engineer earn in California?

Median $214000 from 49 postings across 7 companies.

See salary data

Skills

RTL Verilog ASIC Design Micro-architecture Logic Synthesis Timing Analysis VLSI Design C++ Python Perl Computer Architecture DMA Engines Bus Protocols Interconnect Networks Caches Digital Systems

What you'll do

Implement, document, and deliver high-performance, area, and power-efficient RTL to meet design specifications.
Analyze architectural trade-offs based on features, performance requirements, and system limitations.
Craft micro-architecture and deliver fully verified, synthesis, and timing-clean designs.
Develop various IPs including GPU work schedulers, time distribution systems, interrupt controllers, and DMA engines.
Architect features to facilitate silicon debugging and post-silicon validation activities.
Coordinate with architects, verification, synthesis, and back-end teams to complete design tasks.

What we're looking for

Bachelor's Degree or equivalent experience in Electrical Engineering, Computer Engineering, or Computer Science.
Experience in micro-architecture and RTL development using Verilog.
Good understanding of ASIC design flow including RTL design, verification, logic synthesis, and timing analysis.
Required exposure to Digital systems and VLSI design, Computer Architecture, and Computer Arithmetic.
Strong interpersonal skills and ability to work as an excellent teammate.
Strong C/C++, Python, or Perl skills (preferred).
Good debugging and analytical skills (preferred).
Experience with arbiters, scheduling, synchronization & bus protocols, interconnect networks, and caches (preferred).

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