ASIC Design Engineer

Nvidia

Confirmed live 2 days ago Low trust

Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$100,000–$166,750 / yr
Posted
64 days ago
Freshness
Confirmed live 2 days ago
Nearby
99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $185k
This role $133k
$86k most similar roles pay here $233k

This role pays less than 90% of similar roles. Most pay $152,875–$216,250 — the shaded band above. At the midpoint, this role pays about $133k versus about $185k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 896 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 876 roles with salary data.

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View all roles at Nvidia

At a glance

TL;DR · ASIC Design Engineer

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As an ASIC Design Engineer - New College Grad 2026 on the GPU Design team, you will implement, document, and deliver high-performance, area-efficient, and power-efficient RTL to meet specific design targets. Your daily responsibilities include analyzing architectural trade-offs based on performance requirements and system limitations while crafting micro-architecture and delivering synthesis and timing clean designs. You will work on various IPs including GPU work schedulers, time distribution systems, interrupt controllers, and DMA engines. The role requires proficiency in Verilog for RTL development and a solid understanding of ASIC design flows, logic synthesis, and timing analysis. Required skills include knowledge of digital systems, VLSI design, computer architecture, and computer arithmetic. Additional technical strengths include C/C++, Python, or Perl, along with experience in arbiters, scheduling, synchronization, bus protocols, interconnect networks, and caches to solve complex hardware problems.

What does a ASIC Design Engineer earn in California?

Median $214000 from 47 postings across 8 companies.

See salary data

Skills

RTL Verilog ASIC Design VLSI Micro-architecture Logic Synthesis Timing Analysis C++ Python Perl Computer Architecture Digital Systems Bus Protocols Interconnect Networks DMA Engines

What you'll do

  • Implement and document high-performance, area-efficient RTL to meet specific design targets and requirements.
  • Analyze architectural trade-offs based on features, performance needs, and system limitations.
  • Craft micro-architecture and deliver fully verified, synthesis/timing clean designs.
  • Develop a wide range of IPs including work schedulers, time distribution systems, interrupt controllers, and DMA engines.
  • Architect specific features to facilitate silicon debugging and post-silicon validation activities.
  • Coordinate with cross-functional teams across the design flow to ensure successful project completion.

What we're looking for

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science (or equivalent experience).
  • Experience in micro-architecture and RTL development using Verilog.
  • Understanding of ASIC design flow including RTL design, verification, logic synthesis, and timing analysis.
  • Knowledge of Digital systems, VLSI design, Computer Architecture, and Computer Arithmetic.
  • Proficiency in C/C++, Python, or Perl.
  • Experience with arbiters, scheduling, synchronization, bus protocols, interconnect networks, and caches.
  • Strong debugging and analytical skills.
  • Strong interpersonal skills and ability to work as a team member.

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