Cell Modeling and Verification Engineer

Nvidia

Confirmed live 2 days ago High trust

Quick summary

Work type: On-site
Location: Santa Clara, CA
Salary: $100,000–$166,750 / yr
Posted: 17 days ago
Freshness: Confirmed live 2 days ago
Nearby: 99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $185k

This role $133k

$86k most similar roles pay here $233k

This role pays less than 86% of similar roles. Most pay $152,875–$216,250 — the shaded band above. At the midpoint, this role pays about $133k versus about $185k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 896 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 876 roles with salary data.

Most-posted roles

View all roles at Nvidia

At a glance

TL;DR · Cell Modeling and Verification Engineer

Role Posting Log in to save

The Cell Modeling and Verification Engineer - New College Grad 2026 joins the VLSI team to develop groundbreaking ASIC products at the intersection of circuit and digital design. This role focuses on creating high-performance SoCs and GPUs by developing behavioral models and verification for custom mixed-signal design cells used across all company products. Daily responsibilities include collaborating with cross-functional teams on library builds, cell integration, ASIC verification, and DFT simulation to deliver verified RTL that meets specific design targets. The position requires proficiency in Verilog HDL, SystemVerilog, Python, and Perl. Candidates must possess a strong understanding of digital logic design, waveform debug, and high-speed interconnects like PLLs. This role addresses the technical challenge of creating power-efficient hardware while ensuring all components meet rigorous feature and quality objectives through sophisticated modeling and emulation techniques.

Skills

Verilog SystemVerilog Python Perl RTL ASIC Mixed-Signal Design DFT Waveform Debug Digital Design Logic Design PLL High-Speed Interconnects Simulation Verification

What you'll do

Develop behavioral models and verification for custom mixed-signal design cells.
Model, verify, emulate, and prototype mixed-signal designs using Verilog and SystemVerilog.
Implement high-speed interconnects and PLL components within the hardware architecture.
Use Python or Perl scripts to automate and streamline modeling and verification tasks.
Deliver fully verified, high-performance RTL code to meet specific design targets.
Perform RTL simulation and waveform debugging to ensure design quality.
Coordinate with cross-functional teams on library builds, cell integration, and DFT simulation.

What we're looking for

Bachelor's or Master's degree in Electrical Engineering or Computer Engineering (or equivalent experience).
Hands-on experience with RTL simulation and waveform debug.
Strong understanding of Verilog HDL.
Scripting skills using Python or Perl.
Knowledge of fundamental digital design and logic design concepts.
Experience modeling and verifying mixed-signal designs, including PLLs and high-speed interconnects.
Ability to collaborate with cross-functional teams and communicate technical details effectively.

Similar roles

Senior Cell Modeling and Verification Engineer

Nvidia

Santa Clara, CA 9 days ago $136,000–$218,500

Verilog SystemVerilog Python Perl RTL ASIC Mixed-Signal Design DFT Waveform Debug Circuit Design Digital Design Logic Design PLL High-Speed Interconnects Simulation Verification

3+ yrs exp Hybrid

Save

ASIC Verification Engineer

Nvidia

Santa Clara, CA 66 days ago $100,000–$166,750

System Verilog Verilog C++ Python Perl VCS Verdi Debussy GDB Emulation Prototyping RTL VLSI Digital Design Computer Architecture PCIe Memory Protocols

Save

GPU Verification Engineer

Nvidia

Westford, MA 45 days ago $100,000–$166,750

ASIC Verification C++ Python Perl VCS Emulation FPGA Computer Architecture Memory Models Post-silicon Verification Debug Tools

Save

ASIC Verification Engineer

Nvidia

Austin, TX +1 94 days ago $100,000–$166,750

SystemVerilog UVM VCS RISCV C GDB Assertion-based Verification Functional Coverage Random Stimulus Firmware ASIC Verification High Speed IO micro-architecture Object Oriented Programming

Save

GPU Verification Engineer

Nvidia

Westford, MA +1 30 days ago $100,000–$166,750

UVM C++ C Python Perl ASIC Design Computer Architecture Memory Models VCS Emulation FPGA Post-silicon Verification

Save

ASIC Design Engineer

Nvidia

Santa Clara, CA 64 days ago $100,000–$166,750

RTL Verilog ASIC Design VLSI Micro-architecture Logic Synthesis Timing Analysis C++ Python Perl Computer Architecture Digital Systems Bus Protocols Interconnect Networks DMA Engines

Save