Senior Cell Modeling and Verification Engineer
Nvidia
At a glance
AI generatedThe NVIDIA VLSI team seeks a Cell Modeling and Verification Engineer to contribute to the development of cutting-edge ASIC products. This role involves working closely with new hardware designs to ensure they meet design objectives through behavioral modeling and verification of custom mixed-signal cells. The engineer will use Verilog, SystemVerilog, Perl, or Python to model high-speed interconnects like PLLs and collaborate with cross-functional teams on library builds, cell integration, and DFT simulation. Key responsibilities include documenting, implementing, and delivering verified RTL designs that meet performance targets. Ideal candidates have a background in Electrical Engineering or Computer Engineering, hands-on experience with RTL simulation, strong knowledge of Verilog HDL, scripting skills in Python or Perl, and the ability to collaborate effectively across teams.
Skills
What you'll do
What we're looking for
Market check
This $100,000–$166,750 range sits above 12% of similar postings on FindRole.
Peer median band
$136,150–$218,500
Median floor and ceiling across peers.
Typical midpoint (25–75%)
$152,875–$216,250
Middle half of comparable postings.
Based on 240 comparable postings.
* 240 is the maximum number of comparable postings sampled.
Employer
Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing
Nvidia currently has 802 open roles on FindRole.
Listed pay typically runs $184,000–$287,500 across 798 roles with salary data.
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