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RTL Design Verilog SystemVerilog Python Perl SoC Architecture CDC Synthesis VCS dc_shell GDB Debussy DFT Physical Design Object-Oriented Programming Performance Analysis Design Automation +12 more Show less

Hardware Engineering BIOS BMC Redfish SIPI Agile JIRA Confluence SharePoint PCIe Networking Storage Thermal Mechanical Telemetry Board Design +11 more Show less

PCB Design Schematic Capture Cadence Allegro Mentor Expedition Signal Integrity Power Integrity SPICE PCIe Gen5/6 LPDDR4x/5x DDR4/5 Ethernet JTAG Oscilloscope Logic Analyzer x86 ARM BMC SMBus PMBus SPI PWM Thermal Management EMI Shielding Bring-up Debugging +20 more Show less

Hardware Design PCB Layout Concept Capture Mixed-Signal Design Power Integrity Signal Integrity EMI DFM Python BASH Perl PCI Express USB I2C SMBus PMBus SPI JTAG Linux Windows FPGA ASIC LDOs Digital Oscilloscope +19 more Show less

C C++ Python Verilog SystemVerilog Perl Matlab Vulkan UVM RTL ASIC SoC DSP LTE 5G Wi-Fi Linux Windows Machine Learning +14 more Show less

Signal Integrity Power Integrity High-Speed SerDes PCIe USB DisplayPort Thunderbolt MIPI HDMI DDR Memory Ethernet I2C SPI JTAG I2S Schematic Capture PCB Layout EM Simulation Oscilloscope Spectrum Analyzer Scripting +16 more Show less

Verilog SystemVerilog RTL Design Synopsys Synthesis Python C++ C Computer Architecture Low Power Design Coverage-based Design Verification OpenGL Vulkan Direct3D ASIC GPU DSP Machine-Learning +12 more Show less

PCB Design Schematic Capture Cadence Allegro Mentor Expedition Signal Integrity Power Integrity SPICE PCIe Gen5/6 LPDDR4x/5x DDR4/5 Ethernet JTAG Oscilloscope Logic Analyzer x86 ARM BMC SMBus PMBus SPI PWM Thermal Management EMI Shielding Bring-up Debugging +20 more Show less

system Verilog Verilog Python C++ Perl UVM C Shell MySQL PHP Linux Unix Windows Hardware Design Verification Digital Systems Computer Organization Logic Design HDL Oscilloscopes Logic Analyzers +15 more Show less

system Verilog Verilog UVM Python C++ C Perl Shell MySQL PHP Linux Unix Windows Hardware Design Verification Digital Systems Computer Organization Logic Design HDL Oscilloscopes Logic Analyzers Multimeters +16 more Show less

Schematic Capture Circuit Design FPGA CPLD Board Bring-up Signal Integrity Verilog VHDL Python Perl Tcl RTL Digital Logic Spectrum Analyzers Protocol Analyzers +10 more Show less

Schematic Capture Circuit Design FPGA CPLD Board Bring-up Signal Integrity Verilog VHDL Python Perl Tcl Digital Logic Timing Analysis Spectrum Analyzers Protocol Analyzers Test Automation +11 more Show less

x86 SoC Hardware Architecture Circuit Design Signal Integrity Power Delivery Network PCIe DDR4 LPDDR4 Ethernet C C++ Python Perl Linux Windows Server Oscilloscope JBERT root-cause analysis Schematic Review +15 more Show less