ASIC Design Engineer - Hardware

Nvidia

Hybrid

Quick summary

Work type: Hybrid
Location: Austin, TX
Salary: $116,000–$189,750 / yr
Posted: 4 days ago
Nearby: 99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $191k

This role $153k

$103k most similar roles pay here $238k

This role pays less than 82% of similar roles. Most pay $165,250–$216,250 — the shaded band above. At the midpoint, this role pays about $153k versus about $191k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 980 open roles on FindRole.

Listed pay typically runs $168,000–$270,250 across 966 roles with salary data.

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View all roles at Nvidia

At a glance

TL;DR · ASIC Design Engineer - Hardware

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As an ASIC Design Engineer at NVIDIA’s System-On-Chip group, you will play a crucial role in defining and delivering system-level methodologies and RTL for performance measurement across multiple GPU and SOC projects. Your day-to-day responsibilities include automating flows, designing microarchitecture features, running RTL checks, and collaborating with architects and software engineers to ensure high-quality designs. The ideal candidate has 2+ years of industry experience with strong coding skills in Perl/Python or similar scripting languages, along with expertise in Verilog, SystemVerilog, and design automation tools such as dc_shell and VCS. A deep understanding of SOC architecture, including cross-clock domain issues and performance analysis, is essential, alongside excellent communication and collaboration abilities to work effectively within the team and across functions.

Skills

Python Perl Verilog SystemVerilog dc_shell VCS Debussy GDB Kubernetes Terraform CI/CD Git Unix/Linux CDC multiple-power-domains performance-analysis data-flow object-oriented-programming

What you'll do

Define and develop system-level methodologies for measuring performance in GPUs and SOCs.
Automate flows and support projects using the performance monitoring system.
Implement RTL features and microarchitecture designs for system IP.
Run and debug RTL checks to ensure quality across various design aspects.
Collaborate with architects, designers, and software engineers on tasks.

What we're looking for

2+ years of industry experience in ASIC or SOC design
Strong coding skills in Perl, Python, or other scripting languages
Proficiency in RTL design (Verilog) and verification (SystemVerilog)
Understanding of SOC architecture including CDC, power domains, performance analysis
Experience with design automation tools and methodologies
Hands-on silicon debug experience preferred
Exposure to physical design and system-level IP development

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