This role pays more than
58%
of similar roles. Most pay
$159,750–$216,250
— the shaded band above.
At the midpoint, this role pays about
$187k
versus about
$188k
for comparable roles.
Based on 240 similar postings.
Employer
About Broadcom
Broadcom is a global semiconductor and infrastructure software company that designs and markets a wide range of networking, storage, and wireless connectivity solutions. Industry: Semiconductors & Infrastructure Software
Broadcom currently has
119 open roles
on FindRole.
Listed pay typically runs
$121,900–$195,000
across 105 roles with salary data.
The Design Verification Engineer joins the ASIC Products Division to perform modeling and verification activities for complex digital and mixed-signal IP blocks used in ASIC developments. The role involves defining verification plans, designing environment architectures, developing test cases and test bench components, performing coverage analysis, and debugging simulation failures at both RTL and gate levels. Key responsibilities include creating functional models, evaluating advanced verification methodologies, and collaborating with design teams and EDA vendors. Required technical skills include SystemVerilog, UVM, SystemVerilog Assertions, and scripting in Perl, Python, or Tcl. The candidate must be proficient with Synopsys, Cadence, and Mentor tools while navigating gate-level netlists and SDF files. The work focuses on the verification of complex circuits such as PLLs, DLLs, ADCs, and DACs within a high-performance semiconductor context.