This role pays less than
52%
of similar roles. Most pay
$171,500–$216,250
— the shaded band above.
At the midpoint, this role pays about
$177k
versus about
$194k
for comparable roles.
Based on 240 similar postings.
Employer
About Microsoft
Microsoft Corporation is a global technology leader producing software, hardware, and cloud services including Windows, Office 365, Azure cloud platform, Xbox gaming, and Surface devices. Industry: Software & Cloud Computing
Microsoft currently has
586 open roles
on FindRole.
Listed pay typically runs
$119,800–$234,700
across 577 roles with salary data.
As a Senior Design Verification Engineer within the AISIE team, you will support the development of custom IP and subsystem designs for Microsoft’s AI silicon. Working alongside cross-discipline architecture, design, and verification teams, you will be responsible for creating test plans, building testbenches and environments, crafting specific test cases, and achieving both functional and code coverage closure. The role focuses on moving major silicon building blocks from development through production to support the infrastructure roadmap. Key technical requirements include experience with UVM, AXI protocol, and debugging subsystems or SoCs with embedded processors. Preferred skills include hardware emulation, FPGAs, RTL design, Assembly, linker scripts, and making files for software development. You will apply your expertise in chip and computer architecture to solve complex verification challenges within the AI silicon domain.
What does a Design Verification Engineer earn?
Median $177300 from 31 postings across 8 companies.
Create and review comprehensive test plans for silicon designs.
Develop simulation environments and testbenches for IP, SoC, or system verification.
Craft specific test cases to verify hardware functionality.
Drive functional coverage development and achieve closure for AI silicon components.
Ensure code coverage closure across the design lifecycle.
Debug complex subsystem and SoC scenarios involving embedded processors.
Verify custom IP and subsystem designs for Microsoft's AI infrastructure roadmap.
What we're looking for
A Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field and 1+ year of technical engineering experience.
A Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 4+ years of technical engineering experience.
A Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 5+ years of technical engineering experience.
Ability to pass the Microsoft Cloud Background Check.
Must provide proof of citizenship, U.S. permanent residency, or other protected status for export control eligibility.
6+ years of experience in developing test plans, creating simulation environments, developing tests, and debugging for multiple IPs, SoCs, or systems (preferred).
Substantial background in creating simulation environments, developing tests, or debugging designs (preferred).
Solid understanding of chip and/or computer architecture (preferred).
UVM
SystemVerilog
Verilog
Python
C++
HLS
VCS
Verdi
GDB
DisplayPort
HDMI
MIPI DSI
Assertion-based Verification
Functional Coverage
Constrained-random
Version Control