NVIDIA seeks a Senior Design Engineer to join its Coherent High Speed Interconnect team, focusing on the architecture and design of advanced high-speed interconnects like NVLINK-C2C for mobile SoCs and GPUs. This role involves collaborating with architects, software engineers, and circuit designers to create cutting-edge solutions that enable coherent integration between NVIDIA’s GPUs, DPUs, and CPUs via custom silicon chiplets. The ideal candidate will have a BS in Electrical Engineering or Computer Engineering, along with 8+ years of relevant design experience, expertise in industry-standard interconnect protocols like PCIe, CXL, AXI, and CHI, and proficiency in Verilog or System Verilog. Additionally, candidates should possess strong communication skills and a track record of mentoring junior engineers. This position offers the chance to impact product lines from consumer graphics to self-driving cars and AI, leveraging NVIDIA’s pioneering work in visual computing and deep neural networks.
Skills
PCIe
CXL
AXI
CHI
Verilog
SystemVerilog
RTL design
performance analysis
power optimization
Data link layer
Physical layer
Memory (DDR, LPDDR)
SerDes
Python
CI/CD
What you'll do
Design state-of-the-art high-speed coherent interconnects for mobile SoCs and GPUs.
Collaborate with architects, software engineers, and circuit designers to deliver advanced interconnect solutions.
Enable the creation of integrated products using chiplets technology for NVIDIA’s GPUs, DPUs, and CPUs.
Utilize knowledge of industry-standard interconnect protocols like PCIE, CXL, AXI, CHI in design work.
Conduct performance analysis and power optimization for high-speed coherent interconnects.
What we're looking for
8+ years of relevant hardware design experience in electrical engineering or computer engineering.
Proficiency in industry-standard interconnect protocols like PCIe, CXL, AXI, CHI.
Experience with link layer stacks including data link and physical layers.
Expertise in the physical layer of various interconnects such as memory (DDR, LPDDR) and SerDes.
Strong background in architecture, RTL design, performance analysis, and power optimization.
Excellent knowledge of Verilog or System Verilog for hardware description.
Effective communication skills with a track record of mentoring junior engineers.
Market check
Salary context
This
$168,000–$264,500
range sits above
78%
of similar postings on FindRole.
Peer median band
$140,000–$221,800
Median floor and ceiling across peers.
Typical midpoint (25–75%)
$154,525–$216,250
Middle half of comparable postings.
Based on 240 comparable postings.*
* 240 is the maximum number of comparable postings sampled.
Employer
About Nvidia
Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing
Nvidia currently has
801 open roles
on FindRole.
Listed pay typically runs
$184,000–$287,500
across 797 roles with salary data.
Us, Ca, Santa Clara, US59 days ago
$168,000–$264,500
C++
Python
ICCAD tools
Innovus
Computational geometry
Graph theory
Algorithm development
Multithreading
Distributed computing
High performance software design
GUI development
Machine learning
VLSI Physical Design