Senior ASIC Design Engineer

Nvidia

Confirmed live yesterday Trusted
Hybrid

Quick summary

Work type
Hybrid
Location
Santa Clara, CA
Salary
$136,000–$218,500 / yr
Posted
46 days ago
Freshness
Confirmed live yesterday
Nearby
99+ roles within 25 mi

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $194k
This role $177k
$125k most similar roles pay here $241k

This role pays less than 55% of similar roles. Most pay $172,000–$216,250 — the shaded band above. At the midpoint, this role pays about $177k versus about $194k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 896 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 876 roles with salary data.

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View all roles at Nvidia

At a glance

TL;DR · Senior ASIC Design Engineer

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As a Senior ASIC Design Engineer within the Circuit Solutions Group, you will drive the micro-architecture and digital design implementation of innovative IPs for hardware security, clocking, voltage regulation, and silicon correlation. You will collaborate with architects, circuit designers, and verification engineers to deliver next-generation solutions while developing scalable RTL designs, executing synthesis, and performing timing analysis using advanced CAD tools and process technologies. Your daily responsibilities include functional verification, CDC checks, formal equivalence, and post-si bringup and debug activities. The role requires expertise in Verilog, SystemVerilog, and VLSI with a deep understanding of physical design, multiple clock domains, and asynchronous interfaces. You will also utilize programming skills in Perl or Python to develop tools and Agentic AI flows. This position addresses critical hardware challenges across consumer graphics, self-driving cars, and artificial intelligence.

What does a ASIC Design Engineer earn in California?

Median $214000 from 47 postings across 8 companies.

See salary data

Skills

ASIC Design Verilog System-Verilog RTL VLSI Digital Design Synthesis Timing Analysis CDC Formal Equivalence Python Perl Tcl Make files DFT mixed signal Post-Si Bringup Agentic AI

What you'll do

  • Implement micro-architecture and digital designs for hardware security, clocking, voltage regulation, and silicon correlation.
  • Develop scalable RTL designs using Verilog or SystemVerilog.
  • Execute synthesis and perform timing analysis using advanced CAD tools and process technologies.
  • Perform functional verification, CDC checks, and formal equivalence.
  • Support post-silicon bringup and debug activities.
  • Develop and craft design automation tools and flows, including Agentic AI workflows.

What we're looking for

  • A Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field is required.
  • Advanced degrees such as an MS or PhD are preferred.
  • Candidates must have at least 3 years of relevant experience in logic design and VLSI.
  • Proficiency in Verilog and/or SystemVerilog with a deep understanding of physical design is required.
  • Experience with multiple clock domains, asynchronous interfaces, and digital systems design is required.
  • Programming skills in Perl or Python are required.
  • Strong communication and interpersonal skills are required.
  • Experience with ASIC design flow stages including DFT, timing analysis, and post-si bringup is preferred.

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