This role pays more than
52%
of similar roles. Most pay
$158,512–$216,250
— the shaded band above.
At the midpoint, this role pays about
$177k
versus about
$187k
for comparable roles.
Based on 240 similar postings.
Employer
About Nvidia
Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing
Nvidia currently has
563 open roles
on FindRole.
Listed pay typically runs
$168,000–$264,500
across 556 roles with salary data.
As a Senior ASIC Design Engineer at our Circuit Solutions Group, you will play a pivotal role in developing innovative IPs for hardware security, clocking, voltage regulation, and silicon correlation across diverse product lines including consumer graphics, self-driving cars, and AI. You will collaborate closely with architects, circuit designers, and verification engineers to create world-class solutions using the latest process technologies and CAD tools. Your responsibilities include designing scalable RTL, executing synthesis, performing timing analysis, functional verification, CDC checks, formal equivalence, and supporting post-si bringup activities. Additionally, you will develop and refine design flows and tools, such as Agentic AI flows, to enhance efficiency. Ideal candidates have a BS in Electrical or Computer Engineering with 3+ years of experience in logic design, Verilog/System-Verilog, physical design, VLSI, and digital systems architecture, along with strong programming skills in Perl or Python.
Design micro-architecture and implement digital designs for innovative IPs related to hardware security and clocking.
Collaborate with architects and verification engineers to deliver cutting-edge solutions using advanced CAD tools.
Develop scalable RTL designs and perform synthesis, timing analysis, and functional verification.
Execute CDC checks and formal equivalence validation to ensure design integrity.
Support post-silicon bringup and debug activities for complex integrated circuits.
What we're looking for
3+ years of relevant experience in logic design and VLSI with proficiency in Verilog/System-Verilog.
Deep understanding of physical design, multiple clock domains, and asynchronous interfaces.
Experience across all stages of ASIC design flow including front-end design, verification, DFT, timing analysis, ECO, ATE test development, post-si bringup & debug.
Strong knowledge in digital systems design, computer architecture, and mixed signal/custom designed IPs solutions.
Programming skills in Perl or Python and proficiency in scripting languages like Tcl, Make files, and automation methods.
Excellent communication and interpersonal skills required.