Staff Design Verification Engineer
Arm Holdings
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How this pay compares to similar roles
This role pays more than 97% of similar roles. Most pay $177,250–$242,212 — the shaded band above. At the midpoint, this role pays about $294k versus about $210k for comparable roles.
Based on 240 similar postings.
Employer
Arm Holdings plc is a leading British semiconductor and software design firm, established in 1990 and recognized for developing energy-efficient processor architectures that power nearly all smartphones and a vast range of IoT and computing devices.
Arm Holdings currently has 105 open roles on FindRole.
Listed pay typically runs $209,100–$282,900 across 105 roles with salary data.
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At a glance
As a Principal Design Engineer – High-Speed Interconnect, you will join the team to own the microarchitecture, RTL development, and integration of high-speed interconnect subsystems including PCIe, CXL, and UALink across multiple silicon products. You will translate system requirements into implementation-ready specifications, manage the development process from concept through synthesis preparation, and collaborate with cross-functional teams to meet performance, power, and area targets. The role requires deep expertise in SystemVerilog and high-performance digital subsystems, alongside a strong understanding of AXI, CHI, ACE, APB, and streaming interfaces. You will solve complex problems regarding transaction flows, memory expansion, and coherent connectivity while analyzing traffic patterns and buffer requirements. Key technical domains include CDC, RDC, and low-power builds, ensuring robust performance for high-speed I/O subsystems and sophisticated interconnect architectures in a semiconductor environment.
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