Staff Design Verification Engineer
Arm Holdings
Quick summary
Market check
How this pay compares to similar roles
This role pays more than 55% of similar roles. Most pay $168,500–$230,087 — the shaded band above. At the midpoint, this role pays about $201k versus about $199k for comparable roles.
Based on 240 similar postings.
Employer
Samsung Electronics is a South Korean multinational corporation and a global leader in technology, specializing in consumer electronics, semiconductors, and home appliances.
Samsung Electronics currently has 84 open roles on FindRole.
Listed pay typically runs $106,000–$200,250 across 78 roles with salary data.
Most-posted roles
At a glance
Design Verification Engineer, Coherent Interconnect will join the System IP & SoC Architecture team to verify system IP including coherent interconnects and caches. The role involves architecting, developing, and maintaining reusable verification environments and testbenches from scratch, including stimulus, assertions, checkers, covergroups, and SystemVerilog constraints. You will execute verification strategies, perform code and spec reviews, debug functional failures, and conduct coverage analysis to ensure high-performance, low-latency interconnect solutions for complex SoC designs. Key technical requirements include proficiency in SystemVerilog, UVM, Git version control, and Unix/Perl scripting, along with knowledge of ARM protocols such as CHI, AXI, ACElite, and APB. The work focuses on developing proprietary coherent interconnects and memory controllers to solve performance and power optimization challenges for mobile products, ensuring seamless integration into advanced semiconductor systems and high-performance computing devices.
What does a Design Verification Engineer earn?
Median $195800 from 64 postings across 10 companies.
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What you'll do
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