GPU Physical Design Engineer, STA/Timing

What you'll do

• Lead multiple concurrent Static Timing Analysis (STA) activities while working with functional collaborators.
• Identify and resolve dependencies and roadblocks early in the design cycle to ensure smooth timing closure.
• Define physical design constraints by collaborating with RTL and architecture teams.
• Optimize designs for power, performance, and timing in coordination with Synthesis and Physical Design teams.
• Configure all DFT modes and ensure all test features are properly timed.
• Develop and maintain scripts and automation tools to improve the quality of STA reports.
• Execute ECO flows and perform a full suite of signoff checks to support tapeout activities.
• Collaborate with CAD teams and vendors to improve analysis flows and integrate new features.

What we're looking for

• Bachelor's degree in Computer Science or Computer Engineering.
• Master's degree is preferred.
• 10 years of relevant experience in the field.
• Experience in STA and leading timing closure efforts.
• Knowledge of STA concepts such as cross-talk, OCV, and noise.
• Proficiency in scripting languages including TCL, Python, Perl, or shell scripting.
• Experience working with EDA tools and exposure to their APIs.
• Experience with post-silicon debug and timing correlation.