GPU Physical Design Engineer, STA/Timing

Apple Inc

Confirmed live today Low trust

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Work type
On-site
Location
Austin, TX
Posted
101 days ago
Freshness
Confirmed live today

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Similar $206k
$138k $277k
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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3497 open roles on FindRole.

Listed pay typically runs $174,149–$277,600 across 2702 roles with salary data.

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TL;DR · GPU Physical Design Engineer, STA/Timing

As a GPU Physical Design Engineer, STA/Timing, you will join the Silicon Engineering group to design and manufacture next-generation, high-performance, power-efficient processors. You will lead timing closure for complex GPU designs, identifying dependencies and roadblocks early to ensure smooth execution. Your daily responsibilities include participating in product definition analysis, interacting with RTL and architecture teams to define physical design constraints, and working with Synthesis and Physical Design teams to optimize for power, performance, and timing. You will set up DFT modes, assemble top-level designs, run ECO flows, and drive tapeout activities using signoff checks. Required skills include expertise in STA concepts like cross-talk and OCV, proficiency in TCL, Python, Perl, and shell scripting, and experience with EDA tools and their APIs.

What you'll do

  • Lead Static Timing Analysis (STA) activities and ensure timing closure for complex GPU designs.
  • Identify design dependencies and roadblocks early to ensure smooth execution of timing closure.
  • Define physical design constraints for RTL and architecture teams to inform backend design flows.
  • Implement design optimizations for power, performance, and timing in coordination with Synthesis and Physical Design teams.
  • Set up DFT modes and ensure all test features are properly timed.
  • Create and maintain scripts and automation to generate high-quality STA reports.
  • Run ECO flows and execute a full suite of signoff checks to drive tapeout activities.
  • Perform silicon debug activities and timing correlation with post-silicon and product engineering teams.

What we're looking for

  • Bachelor's degree in Computer Science or Computer Engineering.
  • 10 years of relevant experience.
  • Experience in STA and leading timing closure efforts.
  • Experience with STA concepts such as cross-talk, OCV, and noise.
  • Experience with scripting languages like TCL, Python, Perl, or shell scripting.
  • Experience working with EDA tools and exposure to their APIs.
  • Master's degree (preferred).
  • Experience with post silicon debug and timing correlation (preferred).

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