GPU Physical Design Engineer, STA/Timing

Apple Inc

Confirmed live 2 days ago Trusted

Quick summary

Work type
On-site
Location
Austin, TX
Posted
55 days ago
Freshness
Confirmed live 2 days ago

Market check

Salary context

How this pay compares to similar roles

Similar $203k
$150k most similar roles pay here $253k

This listing doesn't post a salary. Most similar roles pay $177,250–$229,650.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1984 open roles on FindRole.

Listed pay typically runs $175,000–$277,600 across 1590 roles with salary data.

Most-posted roles

View all roles at Apple Inc

At a glance

TL;DR · GPU Physical Design Engineer, STA/Timing

As a GPU Physical Design Engineer, STA/Timing within the Silicon Engineering group, you will manage timing closure for highly complex GPU designs. You will serve as a central point of contact for RTL and architecture teams to define physical design constraints while collaborating with synthesis and physical design teams to optimize for power, performance, and timing. Your daily responsibilities include setting up DFT modes, assembling top-level designs for STA analysis, creating automation scripts, running ECO flows, and driving tapeout activities through signoff checks. You will work with CAD and vendors to improve analysis flows. Required skills include experience in STA, timing closure, or physical design, along with proficiency in scripting languages like TCL, Python, Perl, and shell. You must also understand cross-talk, OCV, noise, and the interactions between DFT, synthesis, and clocking domains.

What you'll do

  • Coordinate with RTL and architecture teams to define physical design constraints for backend flows.
  • Implement designs optimized for power, performance, and timing in collaboration with synthesis and physical design teams.
  • Configure DFT modes and ensure all test features are properly timed.
  • Assemble top-level designs for STA by reviewing logs and reports to ensure accurate analysis.
  • Develop and maintain scripts and automation tools to improve the quality of STA reports.
  • Execute ECO flows to achieve final timing closure on complex GPU designs.
  • Perform a full suite of signoff checks to support tapeout activities and ensure high-quality silicon.
  • Collaborate with CAD teams and vendors to improve analysis flows and integrate new features.

What we're looking for

  • Bachelor's degree in Computer Science or Computer Engineering.
  • Master's degree is preferred.
  • At least 3 years of relevant experience.
  • Experience in STA, timing closure, or physical design.
  • Proficiency in scripting languages such as TCL, Python, Perl, or shell scripting.
  • Experience working with EDA tools and exposure to their APIs.
  • Familiarity with STA concepts including cross-talk, OCV, and noise.
  • Experience analyzing large volume data to identify timing fixes and generate ECOs.

More like this

Similar roles

GPU Physical Design Engineer, STA/Timing

Apple Inc

Austin, TX 55 days ago
STA Timing Closure Physical Design RTL Synthesis DFT Clocking TCL Python Perl Shell Scripting EDA Tools VLSI ECO CMOS Digital Logic Design

GPU Physical Design Engineer, STA/Timing

Apple Inc

Austin, TX 55 days ago
STA Timing Closure TCL Python Perl Shell Scripting EDA Tools DFT RTL Synthesis ECO PPA post silicon debug Tapeout OCV Cross-talk Clocking
10+ yrs exp

GPU Physical Design Engineer

Apple Inc

Austin, TX 144 days ago
Physical Design RTL Synthesis DFT Floorplanning Place and Route TCL Python Perl Shell Scripting VLSI CMOS EDA Tools Power Distribution Multi-voltage

GPU Physical Design Engineer

Apple Inc

Austin, TX 144 days ago
Physical Design ASIC RTL PPA Optimization Floorplanning Place and Route DFT Synthesis TCL Python Perl Multi-voltage Tapeout Design for Yield Thermal Management
10+ yrs exp

GPU Physical Design Engineer

Apple Inc

Santa Clara, CA 144 days ago $184,700$324,800
Physical Design PPA Optimization RTL Synthesis DFT Floorplanning Place and Route TCL Perl Python ASIC Multi-voltage Design for Yield Thermal Management Tapeout
10+ yrs exp

ASIC Design STA Engineer

Amd

San Jose, CA 146 days ago $166,400$249,600
STA SDC TCL Synopsys Design Compiler PrimeTime RTL Synthesis P&R EDA Tools Spyglass Fishtail Linux QoR Scripting ASIC Design
Hybrid