GPU Physical Design Engineer, STA/Timing

What you'll do

• Provide physical design timing constraints to backend design flows based on RTL and architecture requirements.
• Partner with Synthesis and Physical Design teams to optimize designs for power, performance, and timing.
• Set up DFT modes and ensure all test features are properly timed.
• Assemble top-level designs for Static Timing Analysis (STA) by reviewing logs and reports.
• Create and maintain scripts and automation to ensure high-quality STA reports.
• Run ECO flows on the design to achieve final timing closure.
• Execute a full suite of signoff checks to support tapeout activities and ensure manufacturing quality.
• Work with CAD and vendors to improve analysis flows and integrate new features.

What we're looking for

• Bachelor's degree in Computer Science or Computer Engineering required.
• Master's degree (preferred).
• Experience or coursework in physical design, synthesis, DFT, or clocking.
• Experience or coursework with digital logic design, RTL, DV, CMOS transistor logics, or VLSI concepts.
• Experience with scripting languages such as TCL, Python, Perl, or shell scripting.
• Internship or prior work experience in timing closure or physical design (preferred).
• Experience working with EDA tools and exposure to their APIs (preferred).
• Exposure to advanced concepts like XALK, POCVM, ETMs, etc. (preferred).