FPGA Engineer

Amazon Inc

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Redmond, WA
Salary
$96,600–$160,000 / yr
Posted
7 days ago
Freshness
Confirmed live yesterday
Nearby
99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $174k
This role $128k
$85k most similar roles pay here $206k

This role pays less than 95% of similar roles. Most pay $160,000–$187,250 — the shaded band above. At the midpoint, this role pays about $128k versus about $174k for comparable roles.

Based on 240 similar postings.

Employer

About Amazon Inc

Amazon Inc. is the world''s largest e-commerce and cloud computing company, operating the Amazon marketplace, AWS cloud platform, Prime subscription services, Alexa voice AI, and logistics infrastructure. Industry: E-Commerce & Cloud Computing

Amazon Inc currently has 457 open roles on FindRole.

Listed pay typically runs $143,700–$194,400 across 447 roles with salary data.

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View all roles at Amazon Inc

At a glance

TL;DR · FPGA Engineer

Role Posting Log in to save

FPGA Engineer, Amazon LEO OISL The FPGA Engineer, Amazon LEO OISL joins the hardware development team to create and release FPGA solutions for the Optical inter-satellite Link system. This role involves owning bitstreams through every phase of development, including uArchitecture, RTL design, physical implementation, timing closure, simulation validation, and lab-based silicon validation. The engineer will collaborate with systems architects and hardware teams to implement digital logic functions in prototypes to validate architecture alternatives while performing trade-off analyses for cost, size, power, and performance. Key technical requirements include experience with Xilinx/AMD or Altera FPGAs, System Verilog, UVM, and Python for test scripts. The role requires expertise in RTL coding, lint checks, CDC, RDC, and AXI4 interfaces to solve complex communication and data acquisition challenges within the low Earth orbit satellite network infrastructure.

Skills

FPGA ASIC System Verilog UVM RTL Xilinx AMD Altera Python AXI4 AXI Streaming HDL CI/CD Hardware-in-the-loop Timing Analysis Simulation Validation

What you'll do

  • Create and release FPGA bitstreams through all development phases including RTL design, physical implementation, and timing closure.
  • Develop digital logic functions for optical inter-satellite link systems using the latest FPGA technologies.
  • Implement digital logic in FPGA prototypes to validate and trade off architectural alternatives.
  • Perform trade-off analyses to optimize technology resources for cost, size, power, and performance.
  • Conduct simulation validation and lab-based silicon validation for all FPGA designs.
  • Write Python test scripts to validate FPGA images on hardware.
  • Integrate HDL simulation and hardware-in-the-loop testing into CI/CD pipelines for automated regression testing.

What we're looking for

  • Candidates must be a U.S. citizen, national, permanent resident, or granted asylum/refugee status for export control compliance.
  • At least 3 years of experience with ASIC/FPGA design and verification tools.
  • At least 3 years of experience in ASIC/FPGA design verification using System Verilog and UVM.
  • Experience with Xilinx/AMD or Altera FPGAs.
  • Experience with uArchitecture, RTL coding, lint checks, CDC, RDC, and FPGA optimization for timing and power.
  • Experience writing test scripts, preferably in Python, to validate FPGA images in hardware.
  • 5+ years of experience in the full RTL development life cycle including coding standards, source control, and build processes.
  • Familiarity with AXI4 and AXI Streaming interfaces.

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