Senior FPGA Engineer, LEO Payload FPGA

Amazon Inc

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Sunnyvale, CA
Salary
$159,200–$215,300 / yr
Posted
78 days ago
Freshness
Confirmed live yesterday
Nearby
99+ roles within 25 mi

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $191k
This role $187k
$144k most similar roles pay here $226k

This role pays more than 56% of similar roles. Most pay $168,500–$214,000 — the shaded band above. At the midpoint, this role pays about $187k versus about $191k for comparable roles.

Based on 240 similar postings.

Employer

About Amazon Inc

Amazon Inc. is the world''s largest e-commerce and cloud computing company, operating the Amazon marketplace, AWS cloud platform, Prime subscription services, Alexa voice AI, and logistics infrastructure. Industry: E-Commerce & Cloud Computing

Amazon Inc currently has 457 open roles on FindRole.

Listed pay typically runs $143,700–$194,400 across 447 roles with salary data.

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At a glance

TL;DR · Senior FPGA Engineer, LEO Payload FPGA

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Senior FPGA Engineer, LEO Payload FPGA will join the hardware development team to create FPGA solutions for a low Earth orbit satellite broadband network. The role involves owning bitstreams through every development phase, including uArchitecture, RTL design, physical implementation, timing closure, and simulation validation. You will collaborate with system architects and engineering teams to implement digital logic functions, perform trade-off analyses for cost, size, power, and performance, and test systems combining FPGA, firmware, RF, and networking functions. Required skills include over seven years of experience in System Verilog, Xilinx/AMD or Altera FPGAs, and modern ASIC design tools. Preferred qualifications include Python for hardware testing and Cocotb simulation, high-speed networking knowledge like SerDes or 100G Ethernet, and familiarity with AXI4 and AXI Streaming interfaces to solve complex satellite communication challenges.

Skills

FPGA System Verilog RTL Design Xilinx AMD Altera Python Cocotb SerDes Ethernet Interlaken AXI4 AXI Streaming Timing Closure Simulation ASIC Digital Logic

What you'll do

  • Create and release FPGA bitstreams through all development phases including architecture, RTL design, and physical implementation.
  • Develop digital designs for networking functions using modern FPGA technologies and tools.
  • Implement digital logic functions in FPGA prototypes to validate and trade off architectural alternatives.
  • Perform timing closure and simulation validation for FPGA-based solutions.
  • Conduct lab-based silicon validation to test systems combining FPGA, firmware, RF, and networking functions.
  • Execute trade-off analyses to optimize hardware resources for cost, size, power, and performance.
  • Write Python scripts to validate FPGA images in hardware environments.

What we're looking for

  • Must be a U.S. citizen, national, permanent resident, or granted asylum/refugee status for export control compliance.
  • Bachelor's degree in Electrical Engineering or a related field.
  • 7+ years of experience in FPGA design and implementation using SystemVerilog.
  • Experience with modern ASIC/FPGA design and verification tools.
  • Experience with Xilinx/AMD or Altera FPGAs.
  • Experience with uArchitecture, RTL coding, timing and power optimization, simulation, and validation.
  • Experience writing test scripts in Python to validate FPGA images in hardware.
  • Familiarity with high-speed networking (SerDes, 50G/100G Ethernet or Interlaken) and AXI4/AXI Streaming interfaces.

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