FPGA Engineer

Amazon Inc

Confirmed live yesterday High trust

Quick summary

Work type: On-site
Location: Redmond, WA
Salary: $136,000–$184,000 / yr
Posted: 23 days ago
Freshness: Confirmed live yesterday
Nearby: 99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $174k

This role $160k

$129k most similar roles pay here $201k

This role pays less than 70% of similar roles. Most pay $160,000–$187,250 — the shaded band above. At the midpoint, this role pays about $160k versus about $174k for comparable roles.

Based on 240 similar postings.

Employer

About Amazon Inc

Amazon Inc. is the world''s largest e-commerce and cloud computing company, operating the Amazon marketplace, AWS cloud platform, Prime subscription services, Alexa voice AI, and logistics infrastructure. Industry: E-Commerce & Cloud Computing

Amazon Inc currently has 457 open roles on FindRole.

Listed pay typically runs $143,700–$194,400 across 447 roles with salary data.

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At a glance

TL;DR · FPGA Engineer

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FPGA Engineer, Amazon LEO OISL The FPGA Engineer, Amazon LEO OISL joins the hardware development team to create and release FPGA solutions for the Optical inter satellite Link system. This role involves owning bitstreams through every phase of development, including uArchitecture, RTL design, physical implementation, timing closure, simulation validation, and lab-based silicon validation. The engineer will collaborate with systems architects and hardware teams to implement digital logic functions in prototypes to validate architecture alternatives while performing trade-off analyses for cost, size, power, and performance. Key technical requirements include experience with Xilinx/AMD or Altera FPGAs, System Verilog, UVM, and Python for test scripts. The role requires expertise in RTL coding, lint checks, CDC, RDC, and AXI4 interfaces to solve complex communication and data acquisition challenges within the low Earth orbit satellite broadband network infrastructure.

Skills

FPGA System Verilog UVM RTL Python Xilinx AMD Altera AXI4 AXI Streaming CI/CD HIL SolidWorks Ansys DSP Timing Closure CDC RDC

What you'll do

Create and release FPGA bitstreams through the full development lifecycle from architecture to silicon validation.
Develop digital logic functions in FPGAs to support Optical inter-satellite Link systems.
Implement digital logic in FPGA prototypes to validate and trade off architectural design alternatives.
Perform trade-off analyses to optimize technology resources for cost, size, power, and performance.
Write Python test scripts to validate FPGA images on hardware.
Integrate HDL simulation and hardware-in-the-loop testing into CI/CD pipelines for automated regression testing.
Design and implement digital logic functions specifically for control, communication, and data acquisition systems.

What we're looking for

Candidates must be a U.S. citizen, national, permanent resident, or granted asylum/refugee status for export control compliance.
4+ years of experience in mechanical engineering or equivalent experience.
3+ years of experience with ASIC/FPGA design and verification tools.
3+ years of experience in ASIC/FPGA design verification using System Verilog and UVM.
Experience with Xilinx/AMD (or Altera) FPGAs.
Experience with uArchitecture, RTL coding, lint checks, CDC, RDC, FPGA optimization for timing and power, simulation, and validation.
Experience in writing test scripts to validate FPGA images in hardware (Python preferred).
Experience with prototyping and implementation.

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