FPGA Design and Verification Engineer

ASML

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Quick summary

Work type
On-site
Location
Wilton, CT
Salary
$108,000–$157,000 / yr
Employment
Full-time
Posted
19 days ago
Freshness
Confirmed live today
Nearby
99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $189k
This role $132k
$94k $239k
below market most similar roles pay here above market

This role pays less than 94% of similar roles. Most pay $162,000–$216,250 — the blue band above. At the midpoint, this role pays about $132k versus about $189k for comparable roles.

Based on 240 similar postings.

Employer

About ASML

ASML is a leading supplier of lithography equipment, used by the world’s top chipmakers to print microchips that are increasingly powerful, fast and energy efficient.

ASML currently has 66 open roles on FindRole.

Listed pay typically runs $121,800–$173,500 across 52 roles with salary data.

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View all roles at ASML

At a glance

TL;DR · FPGA Design and Verification Engineer

Role Posting Log in to save

As an FPGA Design and Verification Engineer, you will join a multi-disciplined team to specify, design, develop, and test modules and tools. You will be responsible for the entire product life cycle, including concept feasibility, new product introduction, and existing product sustainment. Your daily work involves providing RTL design, simulation, physical implementation, and verification for complex FPGA modules containing custom RTL and vendor IP cores. You will manage requirements with traceability, conduct feasibility studies, and develop validation strategies. Key technologies include VHDL, SystemVerilog, UVM, OSVVM, and Altera High Level Synthesis. You will utilize tools such as ModelSim, Quartus, Mentor CDC, GIT, JIRA, and MATLAB. This role solves technical problems within control, communications systems, and digital signal processing platforms to ensure high-performance, cost-effective hardware solutions.

Skills

FPGA VHDL System Verilog UVM OSVVM Quartus Modelsim Questa Sim Python MATLAB Simulink JIRA GIT DSP RTL ASIC LabVIEW AXI Avalon NIOS

What you'll do

  • Design, develop, and implement RTL for complex FPGA modules using VHDL or SystemVerilog.
  • Perform physical implementation including synthesis, place and route, timing constraints, and power optimization.
  • Develop and execute comprehensive verification strategies, test plans, and simulation environments using UVM or OSVVM.
  • Manage technical requirements with traceability to ensure designs meet functionality, performance, and cost targets.
  • Conduct feasibility studies and research to provide technical recommendations for hardware architecture decisions.
  • Create detailed technical documentation for specifications, design decisions, test procedures, and verification reports.
  • Build and maintain custom test tooling including simulation, emulation, and hardware-based testing tools.
  • Coordinate system integration by managing dependencies and ensuring configuration management across the product lifecycle.

What we're looking for

  • Bachelor's degree in Electrical Engineering required.
  • Master's Degree or PhD preferred.
  • Minimum of 4 years of relevant work experience required.
  • Must be legally authorized to access controlled technology under U.S. Export Administration Regulations.
  • Proficiency in FPGA design languages and tools including VHDL and UVM or OSVVM (Altera High Level Synthesis is preferred).
  • Experience with FPGA development software such as ModelSim, Quartus, and Mentor CDC (preferred).
  • Experience with FPGA SoC, including Avalon and AXI architectures, and implementing embedded processors like NIOS.
  • Knowledge of design tools and languages including SystemVerilog, Questa Sim, GIT, JIRA, MATLAB, and SimuLink (preferred).

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