CPU-Core RTL Director

Qualcomm

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Austin, TXSanta Clara, CA
Salary
$228,400–$342,600 / yr
Posted
39 days ago
Freshness
Confirmed live yesterday
Closes
Mar 17, 2027

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $227k
This role $286k
$159k $362k
below market most similar roles pay here above market

This role pays more than 85% of similar roles. Most pay $199,800–$254,750 — the blue band above. At the midpoint, this role pays about $286k versus about $227k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 575 open roles on FindRole.

Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.

Most-posted roles

View all roles at Qualcomm

At a glance

TL;DR · CPU-Core RTL Director

The CPU-Core RTL Director leads a team of engineers within the CPU Engineering group to develop high-performance, low-power CPU cores. This leadership role oversees the entire development lifecycle, from early architectural exploration and microarchitectural implementation to RTL design, verification readiness, physical design convergence, and silicon bring-up. The manager is responsible for delivering complex subsystems including instruction fetch, branch prediction, execution pipelines, and memory hierarchies. Key responsibilities involve making critical technical tradeoffs regarding power, performance, area, and frequency while managing cross-functional activities with Architecture, DFT, and Firmware teams. Candidates must possess expert knowledge of SystemVerilog and modern RTL development methodologies. The role solves the technical challenge of translating complex architectural requirements into scalable, production-ready silicon for mobile, automotive, XR, and AI computing platforms.

What you'll do

  • Lead a team of RTL engineers to design and deliver complex CPU subsystems from concept to silicon.
  • Translate architectural requirements into scalable microarchitectural implementations for high-performance, low-power CPU cores.
  • Make critical technical tradeoffs involving power, performance, area, frequency, and project schedule.
  • Drive milestone planning including architecture reviews, RTL development, design freezes, and tapeout preparation.
  • Lead bug triage and resolution for functional, performance, power, and timing issues.
  • Coordinate cross-functional activities among Architecture, Verification, Physical Design, Power, DFT, and Firmware teams.
  • Support silicon bring-up, performance characterization, and post-silicon debug activities.
  • Recruit, mentor, and develop engineering talent while establishing technical growth plans.

What we're looking for

  • Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science, or a related field.
  • 12+ years of experience in CPU RTL design, microarchitecture, or related semiconductor development.
  • 3+ years of experience leading engineering teams or large technical projects.
  • Strong understanding of modern high-performance CPU architecture and microarchitecture.
  • Proven experience delivering complex RTL designs into production silicon.
  • MS or PhD degree in Computer Engineering, Electrical Engineering, Computer Science, or a related discipline (preferred).
  • Expert knowledge of SystemVerilog and modern RTL development methodologies (preferred).
  • Deep expertise in CPU domains such as instruction fetch, out-of-order execution, or cache systems (preferred).

More like this

Similar roles

Director, CPU RTL Design Engineering

Amd

Remote (Santa Clara, CA) 32 days ago $248,800–$373,200
RTL Design x86 Computer Architecture Processor Pipeline Memory Hierarchy Instruction Set Architecture Logic Design Python Ruby Perl Silicon Development Lifecycle Tapeout Scripting Automation
Remote

CPU Systems RTL Engineer

Qualcomm

Santa Clara, CA +3 40 days ago $175,600–$263,400
RTL Verilog VHDL Microarchitecture Logic Design Python Perl Simulators Waveform Debugging Power Management Functional Verification Hardware Engineering
4+ yrs exp

RISCV CPU System RTL Engineer

Qualcomm

Santa Clara, CA +3 40 days ago $147,900–$221,900
RISCV Verilog VHDL RTL Design Microarchitecture Logic Design Python Perl Power Management Waveform Debugging Simulators Hardware Engineering ISA Scan-dump Memory Dump
2+ yrs exp

CPU RTL Methodology Engineer

Qualcomm

Santa Clara, CA +1 34 days ago $209,300–$313,900
RTL Design Verilog SystemVerilog Python TCL Perl Bash GIT CI/CD CAD Tools CPU Microarchitecture Hardware Design Automation Frameworks Build Systems
6+ yrs exp

CPU Core RTL Design Engineer

Amd

Austin, TX 110 days ago $178,400–$267,600
Verilog SystemVerilog RTL Design CPU Architecture ASIC Logic Design Synthesis Timing Closure Place-and-Route Python Tcl DFT Power Management Post-Silicon Debug SoC Microarchitecture

CPU Core RTL Design Engineer

Amd

Austin, TX 6 days ago $144,800–$217,200
Verilog SystemVerilog RTL Design CPU Architecture ASIC Logic Design Synthesis Timing Closure Place-and-Route Python Tcl DFT Post-Silicon Debug Power Management Cache Hierarchy TLB Branch Prediction