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SRAM Register_File High_Performance_Design Low_Power_Design Semiconductor_Device_Fundamentals Variation_Aware_Simulation Custom_Memory_Layout NanoTime Ansys_EMIR_Analysis ESP_CV Liberate_Power_Analysis Verilog BIST DFT Memory_Analysis_Flow_Development +10 more Show less

C C++ ARM RISC-V RTOS J-TAG ICE Linux Kernel Driver Development Embedded Systems Multi-core CPUs Memory Consistency Coherency Virtualization Security Super Scalar Architectures Heterogeneous Compute Platforms SPI I2C PCIE CAN Ethernet USB UFS Clocks PLLs GPIO Interrupt Controllers GIC PLIC +25 more Show less

SRAM Register_File Circuit_Simulation Monte_Carlo_Analysis Static_Timing_Analysis NanoTime Ansys_EMIR_analysis ESP-CV Liberate_power_analysis Verilog BIST DFT Custom_Memory_Layout Physical_Implementation_Impact Timing_Characterization +10 more Show less

Python Tcl Power analysis RTL design Synthesis Physical design UPF CPF CPU micro-architecture Power characterization Joules PTPX +7 more Show less

TCL Perl Python Prime-time Tempus ICC2 Innovus STA AOCV POCV CTS TCL scripting Perl scripting Python scripting ASIC back-end design flows Cross-talk noise Signal Integrity Layout Parasitic Extraction Feed through handling +14 more Show less

AI Python Verilog SystemVerilog VHDL Kubernetes Docker CI/CD Prometheus Grafana AWS Git Jenkins PostgreSQL SQLite +10 more Show less

Python JavaScript D3 Django CI/CD Kubernetes SQLite +2 more Show less

C C++ ARMv8/v9 ARM Trusted Firmware (TF-A) UEFI/EDK II ACPI Python CI/CD AI coding assistants LLM-based tools NVIDIA DGX NVIDIA HGX NVIDIA MGX IPMI MCTP PLDM KVM QEMU +13 more Show less

C C++ Python Perl Verilog VHDL UVM SystemC Cadence Synopsys ModelSim Questa TCL SV CI/CD +10 more Show less

Verilog RTL Synthesis Place_and_Route Timing_Analysis Power_Analysis GDS CPU_Microarchitecture Library_Cells High_Performance_Implementation Low_Power_Implementation Tapeout_Flows +7 more Show less

SPICE Python Kubernetes Terraform Docker CI/CD Prometheus Grafana PostgreSQL Git VLSI RTL Physical_Design Clocking_Solutions HDL Verilog SystemVerilog Cadence Synopsys Calibre +15 more Show less

SystemVerilog Python C++ CI/CD Git Terraform Docker Kubernetes AWS PostgreSQL Jenkins Ansible Prometheus Grafana +9 more Show less

RTL VLSI CPU Architecture Power Consumption Process Technologies Circuit Design Low Power Techniques Physical Design GPU Design SOC Design Advanced Packaging Technologies AI HPC Cloud Deployments CI/CD +10 more Show less

CPU SoC Datacenter Server Mobile Compute Auto SoCs Boot Architecture APCI PSCI Dynamic Voltage and Frequency Scaling Analog Mixed Signals IPs Over-Current Protection Power Management Thermal Management Software Control Loops Firmware Control Loops High-Level Architecture Specification RTL Design +12 more Show less

Verilog VHDL Perl Python Power management Debugging tools RTL design RISCV CPU architecture High-performance systems Low-power microarchitecture Telemetry architecture Interrupt controller Timer synchronization RAS and safety mechanisms Architecture and performance monitoring Scripting languages Simulation tools Waveform debugging tools +13 more Show less

CPU SoC Coherent_CPU_Systems RAS Interrupt_Controller Timer_Synchronization NoC_Protocols Debug_Architecture Telemetry_Architecture DFx_Technologies Architecture_Debug_and_Trace Power_Performance_Telemetry RTL_Design High_Level_Architecture_Specifications +9 more Show less

C/C++ Python gdb lldb winDbg perf VTune Nsight SIMD SPMD Linux multi-threading multi-processor systems performance profiling assembly AI workloads LLMs ggml llama.cpp +14 more Show less

Tcl Python Cadence_Genus Synopsys_Fusion_Compiler LEC UPF 5nm_technology_nodes logic_synthesis physical_synthesis EDA_vendors high_performance_chips automation front_end_tasks synthesis_flows computer_architecture micro_architecture circuit_design physical_design +13 more Show less

Python Tcl Innovus Calibre Docker CI/CD Git Unix/Linux Perl C++ VLSI Physical_Design EDA Advanced_Technology_Nodes Place_and_Route Timing_Sign-off PDV_Analysis +12 more Show less

Verilog VHDL Mentor Tessent tools TCL Perl Python Shell scripting JTAG ATPG IEEE 1500 Standard MBIST LBIST SOC level verification Test compression software +9 more Show less