RISCV CPU System RTL Engineer

Qualcomm

Confirmed live yesterday Trusted

Quick summary

Work type
On-site
Location
Santa Clara, CASan Diego, CAAustin, TXRaleigh, NC
Salary
$142,200–$213,400 / yr
Posted
12 days ago
Freshness
Confirmed live yesterday
Closes
Feb 26, 2027

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $199k
This role $178k
$130k most similar roles pay here $253k

This role pays less than 63% of similar roles. Most pay $175,000–$223,000 — the shaded band above. At the midpoint, this role pays about $178k versus about $199k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 623 open roles on FindRole.

Listed pay typically runs $148,300–$222,500 across 603 roles with salary data.

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At a glance

TL;DR · RISCV CPU System RTL Engineer

The RISCV CPU System RTL Engineer joins the CPU Engineering team to develop high-performance, low-power devices. In this role, you will contribute to architecture and product definition while taking responsibility for microarchitecture and RTL execution of critical system features. Your daily work involves developing specifications for timer and interrupt architectures, power management strategies, and debug and trace mechanisms. You will explore performance and power optimization opportunities, refine RTL to meet area and timing goals, and collaborate with cross-functional teams to validate physical design aspects. The role requires proficiency in Verilog or VHDL, experience with simulators and waveform debugging tools, and knowledge of scripting languages like Perl or Python. You will solve complex technical challenges regarding RISCV CPU system features, including configuration access protocols, RAS safety mechanisms, and active/idle power strategies for high-performance systems.

What you'll do

  • Develop high-level architecture and microarchitecture specifications for RISC-V CPU system features.
  • Execute RTL development to meet specific power, performance, area, and timing goals.
  • Identify and implement performance and power optimization opportunities in collaboration with modeling teams.
  • Design and implement system features including timer, interrupt, debug, trace, and power management architectures.
  • Support the design verification team by assisting in the execution of functional verification strategies.
  • Validate physical design aspects such as timing, area, reliability, testability, and power with cross-functional teams.
  • Coordinate with software, firmware, and platform teams to enable CPU system features in final products.

What we're looking for

  • A Master's degree in computer or electrical engineering with 1-3 years of experience in CPU RTL or a related field.
  • A Bachelor's degree and 2+ years of experience in hardware, software, electrical, or systems engineering.
  • A PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
  • Deep knowledge of microprocessor architecture including RISC-V system features like timer synchronization and interrupt controllers.
  • Expertise in power management for high-performance systems, including active/idle strategies and silicon limits.
  • Proven experience defining and developing debug features for high-performance designs.
  • Proficiency in Verilog or VHDL along with experience using simulators and waveform debugging tools.
  • Strong technical documentation skills and effective written and verbal communication abilities.

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