CPU RTL Methodology Engineer

Qualcomm

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Santa Clara, CAAustin, TX
Salary
$209,300–$313,900 / yr
Posted
34 days ago
Freshness
Confirmed live yesterday
Closes
Mar 22, 2027

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $210k
This role $262k
$134k $333k
below market most similar roles pay here above market

This role pays more than 95% of similar roles. Most pay $177,300–$241,750 — the blue band above. At the midpoint, this role pays about $262k versus about $210k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 575 open roles on FindRole.

Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.

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At a glance

TL;DR · CPU RTL Methodology Engineer

The CPU RTL Methodology Engineer joins the CPU Engineering team to bridge the gap between RTL design and CAD automation. In this role, you will define methodologies to build scalable CPU designs, support RTL development, and triage issues across various design teams. You will maintain RTL databases and repositories using GIT while developing automation scripts and tools to improve verification and regression systems. Key responsibilities include interfacing with CAD teams to align tooling with design infrastructure and contributing to continuous integration and build systems for RTL environments. The position requires proficiency in Verilog, SystemVerilog, and Python, with additional familiarity in TCL, Perl, and Bash. You will solve complex hardware design problems by streamlining workflows and documenting best practices for internal teams within the CPU microarchitecture domain.

What you'll do

  • Define and develop methodologies to build scalable and efficient CPU designs.
  • Support RTL development and debug workflows across various CPU design teams.
  • Maintain and enhance RTL databases and repositories using GIT and other version control systems.
  • Triage RTL issues and work with design teams to resolve them efficiently.
  • Develop and maintain Python automation scripts to improve RTL workflows and verification systems.
  • Interface with CAD teams to align RTL tooling with broader design infrastructure.
  • Contribute to continuous integration and build systems for RTL environments.
  • Document workflows, tools, and best practices for internal teams.

What we're looking for

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 6+ years of relevant engineering experience.
  • Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 5+ years of relevant engineering experience.
  • PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field and 4+ years of relevant engineering experience.
  • Strong experience in RTL design using Verilog/SystemVerilog and a deep understanding of CPU microarchitecture.
  • Solid knowledge of RTL databases and version control systems like GIT.
  • Advanced scripting skills in Python; familiarity with TCL, Perl, or Bash is a plus (preferred).
  • Experience with CAD tools, automation frameworks, and CI/CD pipelines in a hardware design environment.
  • Proven ability to triage RTL issues and support design/debug workflows.

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