CPU Core Architecture RTL Engineer

Amd

Confirmed live 2 days ago High trust

Quick summary

Work type
On-site
Location
Fishkill, NY
Salary
$200,000–$300,000 / yr
Posted
11 days ago
Freshness
Confirmed live 2 days ago
Closes
Aug 31, 2027
Nearby
59 roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $201k
This role $250k
$139k most similar roles pay here $317k

This role pays more than 87% of similar roles. Most pay $175,000–$227,300 — the shaded band above. At the midpoint, this role pays about $250k versus about $201k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 367 open roles on FindRole.

Listed pay typically runs $166,400–$249,600 across 367 roles with salary data.

Most-posted roles

View all roles at Amd

At a glance

TL;DR · CPU Core Architecture RTL Engineer

Role Posting Log in to save

As a Principal Member of Technical Staff CPU Core Architecture/RTL Engineer, you will join an experienced engineering team to craft functional units within next-generation processor cores. Your daily responsibilities include executing RTL design and coding for various sections of the processor core pipeline and related logic while collaborating with hardware and software engineers to define high-level architecture and microarchitecture. You will contribute to design verification, synthesis, power reduction, timing convergence, and floorplan efforts while leading teams of designers and mentoring junior engineers. The role requires expertise in Verilog RTL development for high-speed processors, processor architecture, logic design, and power-saving techniques. Required skills include experience with x86 or ARM architectures, physical design verification, and scripting in Perl, Shell, and Tcl to solve complex problems in the domain of high-performance microprocessor design.

Skills

RTL Verilog CPU Architecture Microarchitecture ASIC SoC x86 ARM Synthesis static timing *analysis DFT DFD Power Management Perl Shell Tcl Floorplan Tapeout

What you'll do

  • Execute RTL design and coding for processor core pipeline sections and related logic.
  • Define high-level architecture in collaboration with hardware and software engineering teams.
  • Participate in the microarchitecture definition of next-generation high-performance processor cores.
  • Contribute to design verification, synthesis, power reduction, timing convergence, and floorplan efforts.
  • Lead teams of designers on broad features and supervise the work of junior engineers.
  • Drive methodology improvements for the engineering team.
  • Implement power-saving techniques and manage clocking, reset, and power-up sequences.
  • Address Design-for-Test (DFT) and Design-for-Debug (DFD) logic issues.

What we're looking for

  • Bachelor's, Master's, or PhD degree in Electrical Engineering, Computer Engineering, or Computer Science with a focus on computer architecture.
  • Experience in Verilog RTL development using industry tools in CPU, SoC, or ASIC environments.
  • Expertise in processor architecture and logic design for high-speed processors.
  • Experience with x86 or ARM Architecture (ISA).
  • Knowledge of power-saving techniques, clocking, reset, and power management sequences.
  • Familiarity with physical design, synthesis flow, place and route, and timing closure concepts.
  • Proficiency in scripting languages such as Perl, Shell, and Tcl.
  • Experience with Design-for-Test (DFT) and Design-for-Debug (DFD) logic.

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