CPU Micro-Architect RTL Engineer

Qualcomm

Confirmed live 2 days ago Low trust

Quick summary

Work type: On-site
Location: Austin, TX
Salary: $98,500–$147,700 / yr
Posted: 88 days ago
Freshness: Confirmed live 2 days ago
Closes: Dec 13, 2026
Nearby: 99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $192k

This role $123k

$82k most similar roles pay here $249k

This role pays less than 93% of similar roles. Most pay $168,037–$216,562 — the shaded band above. At the midpoint, this role pays about $123k versus about $192k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 621 open roles on FindRole.

Listed pay typically runs $147,900–$222,500 across 601 roles with salary data.

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At a glance

TL;DR · CPU Micro-Architect RTL Engineer

Role Posting Log in to save

The CPU Micro-Architect RTL Engineer joins the Hexagon team to develop high-performance, energy-efficient CPU cores for mobile SoC, Server, IoT, and Automotive applications. This role involves owning microarchitecture and RTL development while performing low-power optimizations, performance exploration, and achieving specific area and timing goals. The engineer will work on complex technical challenges including instruction sets, power, thermal, and di/dt issues. Key technical areas of focus include processor pipelines, out-of-order execution, load/store units, caches and cache coherence, memory hierarchy, multi-processor and multi-threaded systems, and RISC-V architecture. The position requires a candidate with expertise in CPU microarchitecture and RTL design to solve problems related to modem and AI cores. Candidates must possess a relevant degree and experience in these specific hardware domains to contribute to the development of advanced processor architectures.

Skills

RTL Design CPU Microarchitecture RISC-V Processor Pipelines Out-of-Order Execution Cache Coherence Memory Hierarchy Multi-threaded Systems Low-Power Optimization

What you'll do

Own microarchitecture and RTL development for high-performance, energy-efficient CPU cores.
Implement low-power optimizations to meet specific power and thermal requirements.
Conduct performance exploration to optimize processor pipelines and execution.
Design and develop hardware components including load/store units and cache systems.
Manage memory hierarchy designs and ensure cache coherence across multi-threaded systems.
Address complex di/dt challenges and achieve area and timing goals during the design process.
Develop features for RISC-V architecture and other advanced instruction sets.

What we're looking for

Bachelor's degree in Science, Engineering, or a related field.
Master's degree in Computer Science, Electrical Engineering, or a related field.
1–3 years of experience in CPU architecture and RTL design.
Experience in CPU microarchitecture and RTL development including low-power optimizations.
Knowledge in processor pipelines, out-of-order execution, load/store units, caches, and memory hierarchy.
Knowledge of multi-processor systems, multi-threaded systems, or RISC-V architecture.
Strong communication, collaboration, and teamwork skills.

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