CPU Micro-Architect RTL Engineer

Qualcomm

Quick summary

Work type
On-site
Location
Austin, TX
Salary
$98,500–$147,700 / yr
Posted
3 days ago
Closes
Dec 13, 2026

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $201k
This role $123k
$81k most similar roles pay here $266k

This role pays less than 96% of similar roles. Most pay $176,937–$224,150 — the shaded band above. At the midpoint, this role pays about $123k versus about $201k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 759 open roles on FindRole.

Listed pay typically runs $151,900–$229,800 across 446 roles with salary data.

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At a glance

TL;DR · CPU Micro-Architect RTL Engineer

Join Qualcomm Technologies as a junior-level engineer on the Hexagon team, contributing to the development of high-performance, energy-efficient CPU cores for mobile SoCs, servers, IoT devices, and automotive systems. You will work on industry-leading modem and AI cores, focusing on microarchitecture and RTL design, including low-power optimizations, performance exploration, and meeting area and timing goals. Key areas of expertise include processor pipelines, out-of-order execution, load/store units, caches and cache coherence, memory hierarchy, multi-processor and multi-threaded systems, and RISC-V architecture. Strong communication skills are essential as you collaborate with a team that has delivered over 20 billion cores globally.

What you'll do

  • Own microarchitecture and RTL development for high-performance CPU cores.
  • Conduct performance exploration to optimize power consumption and efficiency.
  • Achieve area and timing goals in core design projects.
  • Develop instruction sets and real-time operating systems (RTOS).
  • Address thermal, di/dt challenges in hardware design.
  • Collaborate on multi-threaded and multi-processor system designs.

What we're looking for

  • Master’s degree in Computer Science, Electrical Engineering, or related field.
  • 1–3 years of experience in CPU architecture and RTL design.
  • Experience with processor pipelines, out-of-order execution, load/store units.
  • Knowledge of caches, cache coherence, memory hierarchy, multi-threaded systems.
  • Familiarity with RISC-V architecture preferred.
  • Strong communication, collaboration, and teamwork skills required.

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