This role pays less than
78%
of similar roles. Most pay
$162,000–$214,000
— the shaded band above.
At the midpoint, this role pays about
$158k
versus about
$188k
for comparable roles.
Based on 240 similar postings.
Employer
About Qualcomm
Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.
Qualcomm currently has
623 open roles
on FindRole.
Listed pay typically runs
$148,300–$222,500
across 603 roles with salary data.
As an ASIC Design Verification Engineer within the ASICS Engineering group, you will manage the complete verification lifecycle from system-level concept to tape out and post-silicon support. Your daily responsibilities include comprehensive pre-silicon test planning for digital power IPs, developing testbenches using advanced methodologies, and creating coverage and assertion models. You will also perform formal verification, develop automation to improve efficiency, and deploy power-aware UPF verification flows. The role requires proficiency in SystemVerilog, UVM, C++, and Python while addressing complex technical challenges involving SOC subsystems, cache, and DDR memory protocols. You will work on critical hardware components including DDR phy and PASIM simulations while performing performance and power verification. This position focuses on the technical execution of digital power IP verification to ensure robust functionality before final silicon production.
SystemVerilog
UVM
SVA
VCS
Questa
JasperGold
Python
Perl
Gate Level Simulation
Formal Verification
mixed signal simulation
PCIe
USB
MIPI
CXL
LPDDR5
LPDDR6
Low Power Verification
System Verilog
UVM
SystemC
Verilog
C++
Formal Verification
ASIC Design
RTL
Linux
Windows
OOP
Simulation
Functional Coverage
Digital Design
Computer Architecture