This role pays more than
50%
of similar roles. Most pay
$162,000–$216,062
— the shaded band above.
At the midpoint, this role pays about
$181k
versus about
$189k
for comparable roles.
Based on 240 similar postings.
Employer
About Amd
AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors
Amd currently has
367 open roles
on FindRole.
Listed pay typically runs
$166,400–$249,600
across 367 roles with salary data.
The ASIC Design Verification Engineer will own the verification strategy and coverage closure for mixed-signal power management IP while contributing to block-level verification and RTL design. The role involves developing and executing system-level verification of the full SOC, including boot sequences, power state transitions, and firmware-driven behavior in co-simulation environments. Key responsibilities include building SystemVerilog/UVM testbench components, managing regression infrastructure, and verifying digital/analog interfaces using real-number models to ensure alignment with silicon intent. The candidate will utilize SystemVerilog, UVM, SVA, Verilog-AMS, and various simulation and debug tools to drive coverage closure before tape-out. This position addresses the technical challenge of verifying complex mixed-signal devices by bridging digital and analog boundaries, ensuring robust functionality across power management systems through rigorous test planning, assertion-based verification, and post-silicon bring-up support.
System Verilog
UVM
SystemC
Verilog
C++
Formal Verification
ASIC Design
RTL
Linux
Windows
OOP
Simulation
Functional Coverage
Digital Design
Computer Architecture