ASIC Design Engineer

Qualcomm

Confirmed live 3 days ago High trust

Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$101,400–$152,200 / yr
Posted
38 days ago
Freshness
Confirmed live 3 days ago
Closes
Mar 24, 2027
Nearby
99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $198k
This role $127k
$85k $251k
below market most similar roles pay here above market

This role pays less than 96% of similar roles. Most pay $168,500–$227,300 — the blue band above. At the midpoint, this role pays about $127k versus about $198k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 594 open roles on FindRole.

Listed pay typically runs $147,900–$219,400 across 568 roles with salary data.

Most-posted roles

View all roles at Qualcomm

At a glance

TL;DR · ASIC Design Engineer

Role Posting Log in to save

JOB TITLE: ASIC Design Engineer The ASIC Design Engineer joins the SoC and ASIC Design organization to contribute to projects spanning high-performance computing, AI, mobile, automotive, and data center technologies. This role involves the architecture, design, implementation, integration, and optimization of ASIC, SoC, and IP solutions. Day-to-day responsibilities include RTL design, static timing analysis, synthesis, verification, and silicon bring-up activities. The engineer will develop design solutions meeting performance, power, area, and timing objectives while enhancing design flows and automation frameworks. Required skills include experience in ASIC, FPGA, or SoC design, understanding of computer architecture, and proficiency with industry-standard design and timing analysis tools. Candidates should also possess programming or scripting experience in languages such as Python, Tcl, or Perl to support engineering productivity and quality.

What does a ASIC Design Engineer earn in California?

Median $214000 from 44 postings across 8 companies.

See salary data

Skills

ASIC Design SoC Design RTL Design Static Timing Analysis Synthesis Verification Silicon Bring-up Python Tcl Perl FPGA Computer Architecture Low-Power Design IP Integration System Simulation Automation Frameworks

What you'll do

  • Participate in the architecture, design, implementation, integration, and optimization of ASIC, SoC, and IP solutions.
  • Develop and validate design solutions that meet performance, power, area, timing, and quality objectives.
  • Perform RTL design, static timing analysis, synthesis, and verification based on project requirements.
  • Analyze and resolve complex design, implementation, and verification challenges using sound engineering practices.
  • Develop and enhance design flows, methodologies, automation frameworks, and engineering tools to improve productivity.
  • Support silicon bring-up activities and apply silicon learnings to improve future designs and processes.
  • Participate in design reviews to provide technical expertise and drive project execution.

What we're looking for

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
  • Experience in ASIC, FPGA, or SoC design and development.
  • Understanding of digital design fundamentals, computer architecture, and semiconductor development processes.
  • Experience with industry-standard ASIC design, implementation, verification, and/or timing analysis tools.
  • Programming or scripting experience with languages such as Python, Tcl, Perl, or similar.
  • Strong analytical, problem-solving, communication, and teamwork skills.
  • Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field (preferred).
  • Experience in RTL design, ASIC implementation, timing analysis, verification, or high-performance computing (preferred).

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