ASIC Design Engineer

Apple Inc

Confirmed live yesterday Low trust

Quick summary

Work type: On-site
Location: Cupertino, CA
Salary: $184,700–$324,800 / yr
Posted: 83 days ago
Freshness: Confirmed live yesterday
Nearby: 99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $195k

This role $255k

$129k $346k

below market most similar roles pay here above market

This role pays more than 98% of similar roles. Most pay $166,746–$223,000 — the blue band above. At the midpoint, this role pays about $255k versus about $195k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3497 open roles on FindRole.

Listed pay typically runs $174,149–$277,600 across 2702 roles with salary data.

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View all roles at Apple Inc

At a glance

TL;DR · ASIC Design Engineer

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The ASIC Design Engineer joins a complex group focused on transforming hardware technology through sophisticated SOC design. This role involves architecting power management solutions, writing microarchitecture and design specifications for SoC level IPs, and designing, implementing, and debugging complex logic designs. The engineer will integrate complex IPs into the SOC while supporting front end integration activities including Lint, CDC, Synthesis, and ECO. Collaboration is required with specialists in SOC Design Verification, Emulation, STA, and Physical Design, as well as software and systems teams. Key technical requirements include experience with multiple clock domains, asynchronous interfaces, and front end tools. Proficiency in scripting languages like Perl, Python, or TCL is also valued for solving intricate hardware problems and ensuring high quality product integration.

What does a ASIC Design Engineer earn in California?

Median $214000 from 49 postings across 7 companies.

See salary data

Skills

ASIC Design SoC Design Logic Design Lint CDC Synthesis ECO STA Physical Design Power Management Clock Management Python Perl TCL Microarchitecture IP Integration

What you'll do

Architect solutions for SoC power management.
Write microarchitecture and design specifications for power management and SoC level IPs.
Design, implement, and debug complex logic designs.
Integrate complex IPs into the SoC.
Support front-end integration activities including Lint, CDC, Synthesis, and ECO.
Collaborate with software and systems teams to ensure high product quality.

What we're looking for

BS degree in a relevant field.
Minimum of 10 years of relevant industry experience.
Experience managing a team of logic designers (preferred).
Experience writing specifications and converting them to design (preferred).
Experience with multiple clock domains and asynchronous interfaces (preferred).
Hands-on experience in all aspects of the chip development process with proficiency in front end tools and methodologies (preferred).
Experience or knowledge of system architecture, CPU & IP Integration, and power and clock management designs (preferred).
Familiarity with software and operating concepts (preferred); familiarity with scripting languages like Perl, Python, or TCL (preferred).

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