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PCB Design PCB Layout System Validation Linux Windows OS Oscilloscope Multimeter Logic Analyzer GPU Tegra SoC Bringup Debug +7 more Show less

ASIC Design RTL Design Verilog VHDL Synthesis Timing Analysis CHI CXL PCI-E PERL CAD Tools Hardware-managed Coherency System Level Caches Protocol Bridges Asynchronous Interfaces +10 more Show less

ASIC Hardware Board Design Signal Integrity Power Integrity PCIe Ethernet DDR SerDes Cadence Allegro HyperLynx ANSYS Keysight ADS Python VNA TDR Oscilloscope Spectrum Analyzer FPGA +14 more Show less

SystemVerilog UVM C++ Python Perl GPU Design Verification Constrained-Random Testing Coverage-Driven Verification RTL Computer Architecture Hardware Modeling Emulation Performance Profiling Formal Verification +9 more Show less

Embedded Linux C C++ Yocto ARM RISC-V Python Tcl Shell Makefiles Git Vitis FPGA SoC Device Trees Ethernet USB SPI UART CAN +15 more Show less

Design Systems Digital Accessibility WCAG 2.2 CI/CD iOS Android Web Product Strategy Internal Tools +4 more Show less

DDR Memory Tuning Signal Integrity Oscilloscopes Schematic Capture Board Design C C++ Java Python Perl Windows OS Linux Firmware +8 more Show less

Python C/C++ FPGA PCB Layout Oscilloscope Logic Analyzer Ethernet CAN I2C SPI PCIe USB SCPI VISA Signal Integrity Power Integrity MIL-STD-810 MIL-STD-461 +13 more Show less

Integrated Optics Photonic Integrated Circuits Optical Sensor Systems MATLAB LabVIEW Lumerical KLayout Optical Simulation Optical Testing Characterization System Validation Physics Electrical Engineering +8 more Show less

ADS Cadence Virtuoso HFSS Claude Code Cursor Dynamic Link Golden Gate EM Simulation Thermal Analysis Transceiver Architectures RF Front-End Circuit Design Simulation Methodologies +8 more Show less

C/C++ Python Perl Ruby Firmware Development SoC Validation Root-Cause Analysis JTAG Logic Analyzers Oscilloscopes System Architecture Platform Bring-Up Test Automation Scripting +9 more Show less

AI/ML Human-Centered AI Design Systems Git Front-end Architecture Rapid Prototyping PR Web Platforms Analytics Platforms Carbon Accounting LCA Materials Science +7 more Show less

Generative AI LLMs RAG AWS Azure Google Cloud Platform Vector Databases Microservices Distributed Systems API Architecture CI/CD DevSecOps Platform Engineering Model Serving Prompt Orchestration Agentic AI IAM Observability +13 more Show less

Python Machine Learning Deep Learning PyTorch TensorFlow LLM VLSI Design CI/CD Version Control Software Development AI Agents +6 more Show less

Matlab Simulink Python C++ ANSYS Saber Sherlock CFD FEA SPICE CarSim Prescan MathCAD MIL SIL HIL VIL DFMEA DRBFM Agile SAFe CAE DNG +18 more Show less

PCB Design PCB Layout Linux Windows Oscilloscope Multimeter Logic Analyzer System Validation SoC GPU Tegra MGX Bringup +8 more Show less

System Verilog Verilog UVM Python C++ ASIC Verification RTL Computer Architecture Testbench Development Regression Triage Coverage Closure Debug Caches Coherency Pipelines Arbitration Interconnect Networks Algorithms Data Structures +14 more Show less

5G NR 4G LTE C++ Python 3GPP Layer1 Layer 2 Layer 3 NAS Network Simulation Multi-threading Pre-silicon Emulation Virtual Platforms Keysight Anritsu R&S +11 more Show less

Verilog RTL Python STA DRC LVS EM/IR Synthesis Physical Design Place and Route Logical Equivalency Memory Subsystem Design Gate Netlist Synthesis Automation Scripts +9 more Show less

Verilog RTL Physical Design STA DRC EM/IR Synthesis Python Logical Equivalency Memory Subsystem Design Gate Netlist Synthesis Automation Scripts +7 more Show less