Senior Design Verification Engineer - GPU Memory Subsystem

Nvidia

Quick summary

Work type
On-site
Location
Durham, NC
Salary
$136,000–$218,500 / yr
Posted
47 days ago

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Competitive pay

How this pay compares to similar roles

Similar $206k
This role $177k
$123k most similar roles pay here $254k

This role pays less than 61% of similar roles. Most pay $177,250–$235,750 — the shaded band above. At the midpoint, this role pays about $177k versus about $206k for comparable roles.

Based on 240 similar postings.

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About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 563 open roles on FindRole.

Listed pay typically runs $168,000–$264,500 across 556 roles with salary data.

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At a glance

TL;DR · Senior Design Verification Engineer - GPU Memory Subsystem

Join our dynamic GPU memory subsystem team as a Senior Design Verification Engineer in Durham, NC, where you will collaborate closely with RTL, DV, FV, and Arch teams to develop and implement verification strategies for complex ASIC IP. Your day-to-day responsibilities include functional and performance verification using advanced tools and methodologies, gaining deep insights into the micro-architectural design of GPU memory subsystems while continuously enhancing your verification skills. Ideal candidates have a BS in CompE, EE, CS or equivalent experience with 5+ years in pre-silicon ASIC verification, including testbench development with UVM components, strong Python or C++ programming skills, and expertise in caches, coherency, complex pipelines, arbiters, and interconnect networks.

What you'll do

  • Develop and implement verification strategies for GPU ASIC memory subsystem IP.
  • Perform functional and performance verification using advanced tools and methodologies.
  • Gain deep understanding of micro-architectural design and implementation of critical IP.
  • Collaborate with RTL, DV, FV, and Arch teams to solve complex verification challenges.
  • Advance verification skills through continuous learning and innovative approaches.

What we're looking for

  • 5+ years of pre-silicon ASIC verification experience.
  • BS Degree in CompE, EE, CS, or equivalent technical field.
  • Expertise in developing verification strategies, test plans, and testbenches.
  • Proficiency with Verilog/SystemVerilog for computer architecture constructs.
  • Experience with caches, coherency, pipelines, arbiters, and interconnect networks.
  • Strong analytical skills and advanced debugging capabilities.

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