Browse tech roles

Hardware Security root-of-trust (RoT Secure Boot Firmware Resiliency Post-Quantum Cryptography AES-GCM SHA-2/3 LMS/XMSS ML-DSA/ML-KEM SPDM TCG DICE IEEE 802.1AR Open Compute Project (OCP) SONiC OpenBMC Caliptra OpenTitan OpenPRoT FPGA Bitstream Security Side-channel Analysis JTAG NIST SP 800-193 NSA CNSA 2.0 TPM +19 more Show less

Hardware Security Root of Trust Secure Boot Cryptographic Primitives ASIC FPGA Verilog SystemVerilog Python Bash NIST SP 800-193 CNSA 2.0 TCG DICE TPM Fault Injection Side-Channel Analysis JTAG PCB Layout Hardware Threat Modeling +14 more Show less

Hardware Security Root of Trust (RoT) Secure Boot Cryptographic Primitives FPGA OpenBMC Caliptra OpenTitan OpenPRoT SPDM TCG DICE TPM NIST SP 800-193 NSA CNSA 2.0 Side-channel Analysis Fault Injection JTAG PCB Design Firmware BIOS Hardware Threat Modeling +16 more Show less

Hardware Security Root of Trust Secure Boot Verilog SystemVerilog Python Bash ASIC FPGA NIST SP 800-193 CNSA 2.0 TCG DICE TPM Side-channel Analysis Fault Injection JTAG RTL Design Cryptographic Primitives +13 more Show less

RISCV assembly Verilog C Firmware SDL Threat Modeling Side-channel Analysis Cryptographic Primitives TEE TrustZone Confidential Computing Symbolic Execution Fuzzing JTAG Binary Instrumentation ChipWhisperer IDA Pro Ghidra Machine Learning +14 more Show less

ASIC Design Hardware Security Threat Modeling C/C++ Verilog Python Perl ARM RISCV Fault Injection Side-Channel Analysis Fuzzing AI/ML Silicon Photonics 3D ICs Chiplets OCP S.A.F.E. +12 more Show less

ASIC Design C/C++ Verilog Python Perl ARM RISCV Cryptography Secure Boot Measured Boot TPM DRM Threat Modelling Penetration Testing Side Channel Attacks Fault Injection Remote Attestation +12 more Show less

Hardware Security embedded system s ASIC FPGA Cryptography PKI Firmware RISC-V TPM DICE CyRes SPDM FIPS 140-3 Common Criteria NIST SP 800-193 Post-Quantum Cryptography Hardware Security Assessment +12 more Show less

Root of Trust Secure Boot Cryptography Trusted Execution Environment Hardware Isolation VLSI SoC TrustZone Virtualization FIPS Common Criteria GlobalPlatform EMVCo PMP +9 more Show less

Embedded Systems DFT DFM DFR Firmware PCB Layout Cadence Schematic Entry Performance Modeling Simulation Tools Test & Measurement Equipment +6 more Show less

Embedded Systems Firmware DFT DFM DFR Schematic Entry PCB Layout Cadence Hardware Specifications Test & Measurement Equipment Power Supply Design +6 more Show less

FPGA HDL Verilog VHDL SystemVerilog PCB Design Ethernet TCP/IP UDP Routing Switching VLANs Hardware Cybersecurity Secure Boot Encryption Digital Hardware Design Schematic Analysis Timing Analysis Simulation Synthesis +15 more Show less

ATE Java Python C++ VB Unix Linux Perl Git SVN DFT JTAG Boundary Scan ATPG MBIST FPGA Digital Circuit Design Lauterbach Trace32 TIC +14 more Show less

ASIC Design Verilog system-verilog RTL Design SoC Digital Design Synthesis Timing Closure DFT Clock Domain Crossings AHB AXI Root of Trust Cryptography Error Correction Codes Silicon Testing Microarchitecture +12 more Show less

Hardware Security C/C++ Python Perl Firmware Linux Threat Modeling Fuzzing Cryptography Secure Boot Key Management Fault Injection +7 more Show less

SoC Hardware Security Secure Boot Cryptographic Engines Trusted Execution Environments Firmware Platform Architecture Attestation SoC Development Lifecycle Technical Program Management DV +6 more Show less

SoC Design Secure Boot Hardware Key Protection Cryptographic Engines Trusted Execution Environments Attestation Firmware Hardware Security SoC Development Lifecycle Technical Program Management Security Specification Review DV +7 more Show less

HW Root of Trust ASIC Design C/C++ Verilog ARM RISCV Python Perl Cryptography Secure Boot Measured Boot TPM Remote Attestation DRM Threat Modelling Penetration Testing Side Channel Attacks Fault Injection +13 more Show less

GPU Architecture Hardware Security RTL Design Threat Modeling Firmware SoC Machine Learning AI Silicon Bring-up Computer Architecture Graphics Architecture Shader Behavior System-level Modeling Verification +9 more Show less