ASIC Design Engineer, Hardware Security

Qualcomm

Confirmed live today High trust

Quick summary

Work type
On-site
Location
San Diego, CASanta Clara, CA
Salary
$145,600–$218,400 / yr
Posted
40 days ago
Freshness
Confirmed live today
Closes
Mar 16, 2027
Nearby
99+ roles within 25 mi

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $189k
This role $182k
$137k $230k
below market most similar roles pay here above market

This role pays less than 52% of similar roles. Most pay $162,000–$215,312 — the blue band above. At the midpoint, this role pays about $182k versus about $189k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 575 open roles on FindRole.

Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.

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View all roles at Qualcomm

At a glance

TL;DR · ASIC Design Engineer, Hardware Security

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The ASIC Design Engineer (Hardware Security) joins the Hardware Security team to develop cutting-edge security solutions for premium Snapdragon chipsets. This role involves the full hardware security product creation flow, including architecture, microarchitecture, design, validation, IP development, synthesis, timing closure, layout, and silicon testing. The engineer will work on state-of-the-art security solutions, countermeasures, and techniques. Key technical requirements include proficiency in Verilog/SystemVerilog RTL design, Clock Domain Crossings, DFT, and bus protocols like AHB and AXI. Candidates must understand clocks, resets, and debug concepts while addressing problems like Root of Trust, RNG, symmetric and asymmetric crypto, side-channel attacks, and error correction codes. The work focuses on high-speed, low-area, and low-power architecture, integrating analog and digital IP into complex subsystems for mobile and networking products.

What does a ASIC Design Engineer earn in California?

Median $214000 from 49 postings across 7 companies.

See salary data

Skills

ASIC Design Verilog system-verilog RTL Design SoC Digital Design Synthesis Timing Closure DFT Clock Domain Crossings AHB AXI Root of Trust Cryptography Error Correction Codes Silicon Testing Microarchitecture

What you'll do

  • Design Verilog/SystemVerilog RTL for high-profile hardware security products and Snapdragon chipsets.
  • Execute the full ASIC design flow including architecture, microarchitecture, synthesis, and timing closure.
  • Implement hardware security solutions such as Root of Trust, RNG, and cryptographic countermeasures.
  • Manage clock domain crossings, bus protocols, and debug concepts for complex subsystems.
  • Perform silicon testing and validation to ensure optimal performance and power consumption.
  • Integrate analog and digital IP into high-speed, low-area, and low-power architectures.
  • Develop and model security techniques to protect against side-channel attacks and errors.

What we're looking for

  • Bachelor’s degree in electrical engineering or related sciences.
  • Master's degree in Science, Engineering, or related field (preferred).
  • PhD in Science, Engineering, or related field (preferred).
  • 6+ years of experience in ASIC design with a Bachelor's degree.
  • 5+ years of experience in ASIC design with a Master's degree.
  • 4+ years of experience in ASIC design with a PhD.
  • Experience in ASIC design flow including architecture, microarchitecture, Verilog/SystemVerilog RTL design, DFT, synthesis, and timing closure.
  • Knowledge of bus protocols, clocks/resets, debug concepts, and hardware security fields like Root of Trust or crypto (preferred).

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