Staff Test Engineer, Hardware Security

Qualcomm

Confirmed live today High trust

Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$141,300–$211,900 / yr
Posted
40 days ago
Freshness
Confirmed live today
Closes
Mar 16, 2027

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $183k
This role $177k
$132k $228k
below market most similar roles pay here above market

This role pays less than 54% of similar roles. Most pay $152,843–$213,531 — the blue band above. At the midpoint, this role pays about $177k versus about $183k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 575 open roles on FindRole.

Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.

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View all roles at Qualcomm

At a glance

TL;DR · Staff Test Engineer, Hardware Security

The Staff Test Engineer, Hardware Security leads a team of engineers in developing, implementing, and optimizing security testing and programming solutions for ASIC, SoC, and multi-chiplet devices. This role involves managing multiple projects to ensure the security, integrity, and reliability of semiconductor products. Key responsibilities include creating test plans prior to chip tape out, developing test programs for ATE platforms, and designing custom digital circuitry for on-board boot and security requirements. The position requires proficiency in Java, C++, VB, Unix/Linux, and scripting with Perl or Python. Candidates must utilize methodologies such as Boundary Scan, ATPG, MBIST, and JTAG protocols. The work focuses on solving chip fusing functionality, improving yield, and reducing test time within the hardware security and OTP programming domain.

What does a Test Engineer earn?

Median $125289 from 36 postings across 10 companies.

See salary data

What you'll do

  • Lead and mentor a team of hardware security test engineers in project execution and professional development.
  • Create test plans prior to chip tape out based on product lifecycle and accessibility requirements.
  • Develop scalable ATE test programs in Java and VB for 93K and UF+ platforms.
  • Analyze test results to improve yield, reduce test time, and ensure product security.
  • Drive debug efforts to resolve chip fusing functionality and yield issues.
  • Develop advanced validation solutions and tools using software systems and applications.
  • Design custom digital circuitry to support on-board boot and product-specific security requirements.

What we're looking for

  • Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related field with 4+ years of Hardware Engineering experience.
  • Master's degree in Computer Science, Electrical/Electronics Engineering, or related field with 3+ years of Hardware Engineering experience.
  • PhD in Computer Science, Electrical/Electronics Engineering, or related field with 2+ years of Hardware Engineering experience.
  • 2+ years of experience in leading or managing engineering teams.
  • 3+ years of relevant experience in ATE and test methodologies.
  • Experience with Object Oriented Programming languages like Java and C++, with the ability to write Java code for ATE functionality.
  • Proficient with Unix/Linux and experience with SVN/GIT or other version control solutions.
  • Experience with digital circuit design and strong SW systems and applications development background.

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