Browse tech roles

Basic role filtering by workplace, salary floor, and post age. For full AI matching and advanced filtering upload your resume using AI Match.

7 of up to 20 (filtered)

High-Speed HBM, LPDDR Memory Controller ASIC Digital Design Engineer

Qualcomm

San Diego, CA 8 days ago $140,000$229,800
Actively hiring Confirmed live yesterday High trust Competitive pay
ASIC Design RTL Coding Digital Design HBM LPDDR DDR NoC SRAM Cache Controller x86 ARM Gate Level Simulation Synthesis Timing Closure Power Analysis Hardware Architecture
4+ yrs exp

Project Controls Manager, Design & Construction

Oracle

Nashville, TN 18 days ago $89,900$187,000
Actively hiring Confirmed live yesterday High trust Below market
Primavera P6 Microsoft Project Excel Earned Value Management Cost Engineering Risk Management Change Management Project Controls Business Intelligence Data Governance Construction Management Quantity Surveying Procurement Planning
8+ yrs exp

Staff Memory Controller Architecture and Design Engineer

Qualcomm

San Diego, CA 43 days ago $140,000$210,000
Actively hiring Confirmed live yesterday Low trust Below market
ASIC Design RTL to GDS Flow Virtuoso System Simulation Synthesis Place and Route Verification Validation Scripting SoC
4+ yrs exp

Motor Controls Engineer (Electrical/PCB Design)

Anduril Industries

Costa Mesa, CA 59 days ago $121,000$171,000
Actively hiring Confirmed live 2 days ago High trust Below market
PCB Design Altium KiCAD Microcontrollers Servo Control Systems Power Conversion Embedded Systems Device Trees I2C SPI CAN CANFD UART RS485 USB MIPI CSI2 Oscilloscopes Soldering
3+ yrs exp

Memory Control Design Engineer

Qualcomm

San Diego, CA 59 days ago $115,600$173,400
Actively hiring Confirmed live yesterday Trusted Below market
ASIC Design RTL DDR LPDDR PCDDR x86 ARM C C++ Synthesis Timing Closure Gate Level Simulation Power Analysis Micro-architecture Logic Design
2+ yrs exp

ASIC Design Engineer, Cache Controller

Apple Inc

Santa Clara, CA 144 days ago $184,700$324,800
Actively hiring Confirmed live 2 days ago High trust Above market
ASIC Design RTL Micro-architecture SoC Cache Coherence Protocols DRAM Controller Timing Closure Memory Systems Interconnect Architectures
10+ yrs exp

ASIC Design Engineer, Cache Controller

Apple Inc

Santa Clara, CA 144 days ago $150,400$277,600
Actively hiring Confirmed live yesterday High trust Above market
ASIC Design RTL Micro-architecture SoC Cache Coherence DRAM Controller Timing Closure Netlist Memory Systems Interconnect Architectures
3+ yrs exp