Staff Memory Controller Architecture and Design Engineer

Qualcomm

Confirmed live yesterday Trusted

Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$145,600–$218,400 / yr
Posted
40 days ago
Freshness
Confirmed live yesterday
Closes
Mar 16, 2027

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $212k
This role $182k
$131k $278k
below market most similar roles pay here above market

This role pays less than 72% of similar roles. Most pay $181,795–$242,062 — the blue band above. At the midpoint, this role pays about $182k versus about $212k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 575 open roles on FindRole.

Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.

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At a glance

TL;DR · Staff Memory Controller Architecture and Design Engineer

The Staff Memory Controller Architecture and Design Engineer joins the ASICS Engineering group to define, model, design, optimize, verify, validate, implement, and document IP development for high performance, high quality, and low power products. This role involves creating advanced architectures, circuit specifications, logic designs, and system simulations based on system-level requirements. The engineer will evaluate complex process flows from high-level design to synthesis, place and route, timing, and power use. Key technical requirements include proficiency with RTL to GDS Flow and Virtuoso tools, as well as experience with scripting tools, programming languages, and design verification methods. The position requires collaborating across functional teams to execute implementation strategies that meet specific customer needs and system requirements for complex blocks, SoCs, or IC packages.

What you'll do

  • Define, model, design, optimize, verify, and document IP development for high-performance, low-power products.
  • Create advanced architectures, circuit specifications, logic designs, and system simulations based on requirements.
  • Develop and execute implementation strategies to meet system requirements and customer needs.
  • Evaluate complex process flows from high-level design through synthesis, place and route, and timing.
  • Use tools like RTL to GDS Flow and Virtuoso to design complex blocks and IC packages.
  • Write and review detailed technical documentation for complex EDA, IP, and ASIC projects.
  • Provide supervision and guidance to other team members on technical tasks.

What we're looking for

  • Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
  • Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
  • PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
  • Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science (preferred).
  • 6+ years of ASIC design, verification, validation, integration, or related work experience (preferred).
  • 2+ years of experience with architecture and design tools (preferred).
  • 2+ years of experience with scripting tools and programming languages (preferred).
  • 2+ years of experience with design verification methods (preferred).

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