Staff Memory Controller Architecture and Design Engineer

Qualcomm

Confirmed live yesterday Low trust

Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$140,000–$210,000 / yr
Posted
43 days ago
Freshness
Confirmed live yesterday
Closes
Jan 26, 2027

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $210k
This role $175k
$126k most similar roles pay here $267k

This role pays less than 78% of similar roles. Most pay $181,675–$238,362 — the shaded band above. At the midpoint, this role pays about $175k versus about $210k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 623 open roles on FindRole.

Listed pay typically runs $148,300–$222,500 across 603 roles with salary data.

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At a glance

TL;DR · Staff Memory Controller Architecture and Design Engineer

As a Staff Memory Controller Architecture and Design Engineer within the ASICS Engineering group, you will define, model, design, optimize, verify, validate, implement, and document IP development for high-performance, low-power products. You will create advanced architectures, circuit specifications, logic designs, and system simulations based on specific system-level requirements while collaborating with cross-functional teams to execute implementation strategies. Your daily work involves evaluating complex process flows from high-level design through synthesis, place and route, timing, and power usage. To succeed in this role, you must utilize tools such as Virtuoso and RTL to GDS Flow, along with scripting tools and programming languages for advanced architecture design. You will also be responsible for writing detailed technical documentation for complex EDA, IP, and ASIC projects while providing guidance to other team members on the project.

What you'll do

  • Define, model, design, optimize, verify, and document IP development for high-performance, low-power products.
  • Create advanced architectures, circuit specifications, logic designs, and system simulations based on requirements.
  • Develop and execute implementation strategies that meet system requirements and customer needs.
  • Evaluate complex process flows including synthesis, place and route, timing, and power usage.
  • Utilize EDA tools and applications to execute the design of complex blocks and SoC packages.
  • Write and review detailed technical documentation for complex EDA, IP, and ASIC projects.
  • Provide guidance and supervision to other team members on technical tasks.

What we're looking for

  • Bachelor's degree in Science, Engineering, or a related field with 4+ years of ASIC design, verification, validation, or integration experience.
  • Master's degree in Science, Engineering, or a related field with 3+ years of ASIC design, verification, validation, or integration experience.
  • PhD in Science, Engineering, or a related field with 2+ years of ASIC design, verification, validation, or integration experience.
  • Preferred: Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science.
  • Preferred: 6+ years of experience in ASIC design, verification, validation, or integration.
  • At least 2 years of experience with architecture and design tools.
  • At least 2 years of experience with scripting tools and programming languages.
  • At least 2 years of experience with design verification methods.

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