Senior RTL Design Engineer, DDR/LPDDR Memory Controller

Amd

Confirmed live today High trust
Hybrid

Quick summary

Work type
Hybrid
Location
Austin, TXBoxborough, MAVancouver, BC, Canada
Salary
$178,400–$267,600 / yr
Posted
85 days ago
Freshness
Confirmed live today
Closes
Jul 10, 2027
Nearby
99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $198k
This role $223k
$139k most similar roles pay here $281k

This role pays more than 74% of similar roles. Most pay $168,500–$227,500 — the shaded band above. At the midpoint, this role pays about $223k versus about $198k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 512 open roles on FindRole.

Listed pay typically runs $166,400–$249,600 across 512 roles with salary data.

Most-posted roles

View all roles at Amd

At a glance

TL;DR · Senior RTL Design Engineer, DDR/LPDDR Memory Controller

Role Posting Log in to save

Sr. RTL Design Engineer – DDR/LPDDR Memory Controller will join the Memory Controller Design team to develop advanced technologies and deliver high-quality products. The role involves collaborating with architects to define and implement IP microarchitecture features, developing RTL designs for these features, and optimizing for power, performance, and area. Key responsibilities include participating in design specification and code reviews, performing lint, CDC, and timing analysis, and partnering with verification engineers to validate and debug IP throughout the project lifecycle. The position requires expertise in digital logic design, Verilog or SystemVerilog, and scripting languages like Python, Perl, or Tcl. Candidates should possess a strong understanding of computer architecture and experience with DDR or LPDDR memory systems. This role focuses on solving technical challenges within the specific domain of memory controller hardware implementation.

Skills

RTL Design Verilog SystemVerilog Python Perl Tcl Digital Logic Design Computer Architecture DDR LPDDR EDA Tools Lint CDC Timing Analysis Synthesis Simulation Verification

What you'll do

  • Define and implement IP microarchitecture features in collaboration with architects.
  • Develop RTL designs for specific IP features.
  • Analyze and optimize designs for power, performance, and area (PPA).
  • Participate in design specification reviews and peer code reviews.
  • Perform lint, CDC, and timing analysis to ensure high-quality design implementation.
  • Collaborate with verification engineers to validate and debug IP throughout the project lifecycle.

What we're looking for

  • Bachelor's or master's degree in computer engineering, Electrical Engineering, Computer Science, or a related technical field.
  • Experience or interest in processor architecture, digital design, and verification.
  • Ability to communicate technical concepts clearly and collaborate effectively with global teams.
  • Experience with digital logic design (preferred).
  • Experience with Verilog and/or SystemVerilog (preferred).
  • Experience with scripting languages such as Python, Perl, or Tcl (preferred).
  • Understanding of computer architecture (preferred).
  • Experience with DDR or LPDDR memory systems, EDA tools, and design flows (preferred).

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