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PLL Clock Generation SerDes RF mixed signal CMOS Spectre SpectreRF AMS Matlab Verilog SystemVerilog Physical Layout Lab Testing +9 more Show less

Mixed-Signal Design Matlab SPICE FinFET ADC DAC PLL RF Silicon Photonics Analog Front-End Clock Distribution SAR-ADC +7 more Show less

Cadence Virtuoso Analog Artist MATLAB SPICE Bandgap Layout Post-layout Extraction Silicon Bring-Up ATE Mixed-Signal Design +5 more Show less

Mixed-Signal Design Cadence Virtuoso MATLAB SPICE Bandgap High-Speed I/O Power Management Automatic Test Equipment (ATE) +3 more Show less

Analog/Mixed-Signal SERDES FinFET VerilogA Oscilloscopes Spectrum Analyzers Signal Generators High-Speed Data Converters LDO Regulators +4 more Show less

CMOS Mixed Signal Design Cadence ADE MATLAB SPICE Verilog VHDL PLL SERDES 5G Analog Design Automation Layout Silicon Evaluation +8 more Show less

Cadence Virtuoso ASIC Design SerDes DDR PLL DAC ADC Python MATLAB SPICE Verilog VHDL Circuit Simulation Schematic Capture FinFET CMOS +11 more Show less

Cadence Virtuoso ASIC Design SerDes PLL DAC ADC Matlab Python SPICE Verilog VHDL CMOS FinFET Signal Processing Schematic Capture +10 more Show less

CMOS Cadence (Virtuoso Calibre Matlab AMS Spectre EMX High Speed Serial Links Opamps Programmable Gain Amplifiers FinFET GAA Power Integrity Electromigration Analysis +9 more Show less

Analog/Mixed-Signal SERDES VerilogA FinFET CMOS Oscilloscopes Spectrum Analyzers Signal Generators Circuit Design Layout Supervision Bench Evaluation Characterization High-Speed Data Converters +8 more Show less

IC Design Mixed-Signal CMOS FinFET Cadence (virtuoso Spectre AMS Matlab EMX High Speed Serial Links OpAmps Power Integrity Layout Floorplanning ESD +10 more Show less

SystemVerilog Verilog-AMS Cadence ncsim xrun vcs TCL Perl Python RTL Testbench SARADC FSM Cursor chipAgents +10 more Show less