This role pays more than
79%
of similar roles. Most pay
$177,250–$227,350
— the shaded band above.
At the midpoint, this role pays about
$240k
versus about
$202k
for comparable roles.
Based on 240 similar postings.
Employer
About Cisco
Cisco Systems is the world''s leading networking technology company, designing and manufacturing networking hardware, telecommunications equipment, and cybersecurity solutions for businesses and governments. Industry: Networking Technology & Cybersecurity
Cisco currently has
178 open roles
on FindRole.
Listed pay typically runs
$167,700–$245,200
across 142 roles with salary data.
Senior Analog/mixed-signal IC Design Engineer - Acacia (Hybrid) joins the Mixed-signal IC design group to develop high speed, high accuracy analog designs for optical communications products. This role involves architecting, designing, laying out, measuring, and productizing ultra-deep sub-micron-based CMOS products while leading large blocks on complex chips and mentoring team members. The engineer will collaborate with packaging and hardware teams to ensure signal and power integrity specifications are met. Key technical requirements include experience with high speed ICs such as serial links, voltage regulators, phase locked loops, and opamps. Candidates should be proficient in Cadence Virtuoso, Spectre/APS/SpectreX, Matlab, and EMX tools. The work focuses on the 100G, 400G, and 1T bit speed fiber optic transmission market for data center, metro, long-haul, and ultra-long haul telecommunication networks using advanced signal processing and photonic integration.
Architect, design, layout, measure, and productize ultra-deep sub-micron-based CMOS products.
Lead development for large blocks on complex chips while mentoring team members and tracking deliverables.
Perform peer reviews of complex IC designs to ensure high-quality design methodology from conception to production.
Develop high-speed AMS circuits and advanced analog designs for optical communication products.
Ensure signal and power integrity specifications are met in coordination with packaging and hardware teams.
Design and simulate high-speed components including SerDes, voltage regulators, PLLs, and amplifiers.
Execute high-frequency layouts including passive component design and floorplanning for power and ground.
What we're looking for
A BSEE with 12+ years experience, an MS with 8+ years experience, or a PhD with 5+ years experience is required.
Experience in the design, simulation, and measurement of high-speed ICs in at least three specific areas like serial links, voltage regulators, or PLLs.
Experience with electrical transceiver applications including backplane and cable communications (preferred).
Experience with FinFET technology (preferred).
High-frequency layout experience including passive component design and floorplanning (preferred).
Custom transistor layout experience and experience designing for manufacturability (preferred).
Experience with ESD laboratory practices and methodology (preferred).
Proficiency with Cadence, Matlab, and mixed-signal simulations in AMS (preferred).