Analog/Mixed Signal ASIC Design Engineer

Qualcomm

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$98,500–$147,700 / yr
Posted
28 days ago
Freshness
Confirmed live yesterday
Closes
Feb 10, 2027

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $196k
This role $123k
$83k most similar roles pay here $246k

This role pays less than 95% of similar roles. Most pay $175,000–$217,500 — the shaded band above. At the midpoint, this role pays about $123k versus about $196k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 623 open roles on FindRole.

Listed pay typically runs $148,300–$222,500 across 603 roles with salary data.

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At a glance

TL;DR · Analog/Mixed Signal ASIC Design Engineer

The Analog/Mixed Signal ASIC Design Engineer joins the Analog Mixed Signal Design team to oversee the definition, design, verification, and documentation of various CMOS mixed analog/digital blocks. This role involves developing components such as data converters, PLLs, audio amplifiers, and high-speed SERDES while determining architecture designs based on system requirements. The engineer will perform circuit simulations, run power and performance analyses, manage block-level layouts, and write technical documentation for straightforward projects. Key tools and technologies include Cadence ADE, MathWorks MATLAB, SPICE, and Verilog/VHDL. The work focuses on solving complex hardware challenges in the semiconductor space, specifically involving 5G initiatives and analog design automation. Candidates must possess expertise in nanometer planar CMOS or FinFET designs to ensure seamless integration of components within their specific technical domain.

What you'll do

  • Design and document CMOS mixed analog/digital blocks including data converters, PLLs, and high-speed SERDES.
  • Determine architecture designs and circuit specifications based on system-level requirements.
  • Perform simulations and analyses for power and performance to verify and improve designs.
  • Oversee block-level layout in coordination with the layout team.
  • Program and run tests to identify bugs and debug technical issues within assigned blocks.
  • Write technical documentation and design descriptions for straightforward projects.
  • Provide technical expertise for new initiatives such as 5G and analog design automation.

What we're looking for

  • Bachelor's Degree in Electrical Engineering and 2+ years of experience with analog or mixed-signal integrated circuit design in nanometer planar CMOS or FinFET.
  • Master's degree in Electrical Engineering or a related field.
  • 2+ years of experience using one or more design tools such as Cadence, SPICE, MATLAB, or Verilog/VHDL.
  • Preferred experience in specific analog/mixed-signal integrated CMOS circuit designs like VCO, PLL, DLL, Audio CODEC, or high-speed SERDES.
  • Ability to oversee block-level layout and perform simulations for power and performance analysis.
  • Proficiency in writing technical documentation and design descriptions for straightforward projects.

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