Analog/Mixed Signal ASIC Design Engineer

Qualcomm

Confirmed live today High trust

Quick summary

Work type: On-site
Location: San Diego, CA
Salary: $101,400–$152,200 / yr
Posted: 40 days ago
Freshness: Confirmed live today
Closes: Mar 16, 2027
Nearby: 99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $209k

This role $127k

$84k $262k

below market most similar roles pay here above market

This role pays less than 96% of similar roles. Most pay $176,687–$241,750 — the blue band above. At the midpoint, this role pays about $127k versus about $209k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 575 open roles on FindRole.

Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.

Most-posted roles

View all roles at Qualcomm

At a glance

TL;DR · Analog/Mixed Signal ASIC Design Engineer

Role Posting Log in to save

The Analog/Mixed Signal ASIC Design Engineer joins the Analog Mixed Signal Design team to oversee the definition, design, verification, and documentation of various CMOS mixed analog/digital blocks. This role involves determining architecture designs and circuit specifications based on system level requirements for components such as data converters, PLLs, analog/digital filters, low drop out linear voltage regulators, precision references, comparators, fingerprint sensor AFEs, audio amplifiers, and high speed SERDES. The engineer will perform circuit design, simulations, and layout oversight while providing technical expertise for 5G and analog design automation. Required skills include proficiency in Cadence ADE, MathWorks MATLAB, SPICE, and Verilog/VHDL. The work focuses on developing integrated circuits using nanometer planar CMOS or FinFET technologies to solve complex hardware integration problems.

Skills

CMOS Mixed Signal Design Cadence ADE MATLAB SPICE Verilog VHDL FinFET 5G PLL SERDES Layout Analog Design Automation

What you'll do

Contribute to architecture and circuit designs for small, well-defined CMOS mixed-signal blocks.
Oversee block-level layout in coordination with layout teams.
Run simulations and basic analyses for power and performance to verify designs.
Program and run basic tests to identify and debug bugs in individual work.
Write technical documentation and design descriptions for straightforward projects.
Build technical domain knowledge to ensure seamless integration with other components.
Use design tools like Cadence ADE and MATLAB to perform circuit simulations.

What we're looking for

Bachelor's Degree in Electrical Engineering and 2+ years of experience with analog or mixed-signal integrated circuit design in nanometer planar CMOS or FinFET.
Master's degree in Electrical Engineering or related field.
2+ years of experience using one or more design tools such as CADENCE, SPICE, MATLAB, and/or Verilog/VHDL.
2+ years of experience in analog/mixed-signal integrated CMOS circuit design for a specific area (preferred).

Similar roles

Analog/Mixed Signal ASIC Design Engineer

Qualcomm

San Diego, CA 40 days ago $145,600–$218,400

Cadence Virtuoso ASIC Design Python Matlab SPICE Verilog VHDL Mixed-Signal Design CMOS FinFET SerDes PLL DAC ADC Signal Processing Schematic Capture

4+ yrs exp

Save

Analog/Mixed Signal ASIC Design Engineer

Qualcomm

San Diego, CA 40 days ago $145,600–$218,400

Cadence Virtuoso SPICE Python Matlab Verilog VHDL ASIC Design Mixed Signal Design Analog Circuit Design SerDes DDR PLL DAC ADC FinFET CMOS Signal Processing

2+ yrs exp

Save

Analog/Mixed-Signal Design Engineer

Broadcom

San Jose, CA 33 days ago

Analog/Mixed-Signal Design Cadence Virtuoso Analog Artist MATLAB SPICE Layout Post-layout Extraction ADCs DACs PLLs LDOs Bandgaps ATE Behavioral Modeling

5+ yrs exp

Save

Analog/Mixed-Signal Design Engineer

Broadcom

San Jose, CA 33 days ago

Analog/Mixed-Signal Design Cadence Virtuoso Analog Artist MATLAB SPICE Layout Post-layout Extraction ADCs DACs PLLs LDOs Bandgaps ATE Behavioral Modeling

5+ yrs exp

Save

Analog and Mixed Signal Design Engineer

Broadcom

Chandler, AZ +1 63 days ago $109,700–$175,500

Mixed-Signal Analog Design Cadence Virtuoso Spectre HSPICE PrimeSim Verilog Synopsys PrimeTime Xcelium VCS Python Perl SKILL SPICE Monte Carlo Simulation Bandgap Voltage Regulators Post-Layout Validation Silicon Bring-up ESD Latch-up Failure Analysis

6+ yrs exp

Save

Analog Mixed Signal/Power Management Design Engineer

Qualcomm

San Diego, CA 40 days ago $145,600–$218,400

Mixed-Signal IC Design CMOS FinFET Cadence SPICE MATLAB Verilog VHDL ASIC Design Analog Design Layout ATE Data Converters PLL Buck/Boost Switching Regulators Charge Pumps Precision References

5+ yrs exp

Save