Staff Analog/Mixed Signal Engineer

Samsung Semiconductor

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Quick summary

Work type
On-site
Location
San Jose, CA
Salary
$163,000–$253,000 / yr
Posted
3 days ago
Freshness
Confirmed live today

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Competitive pay

How this pay compares to similar roles

Similar $205k
This role $208k
$144k most similar roles pay here $265k

This role pays more than 57% of similar roles. Most pay $175,057–$234,737 — the shaded band above. At the midpoint, this role pays about $208k versus about $205k for comparable roles.

Based on 240 similar postings.

Employer

About Samsung Semiconductor

Samsung Semiconductor is the global semiconductor business unit of Samsung Electronics, designing and manufacturing memory chips, logic semiconductors, and foundry solutions for a broad range of applications.

Samsung Semiconductor currently has 36 open roles on FindRole.

Listed pay typically runs $163,000–$253,000 across 36 roles with salary data.

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At a glance

TL;DR · Staff Analog/Mixed Signal Engineer

Staff Analog/Mixed Signal Engineer The Staff Analog/Mixed Signal Engineer joins the team to design and develop high-performance PLL and clocking subsystems for RF transceivers, SerDes, and high-speed I/O applications using advanced deep-submicron CMOS technologies. This role involves designing RF/Analog PLL and clocking circuits, developing Serdes analog PHY circuits, performing mixed signal system modeling and analysis, and executing design verification and production support tasks. The candidate will collaborate with digital and software developers to ensure implementations meet specific system requirements. Required expertise includes experience with frequency synthesizer and clock generation circuits such as VCO, DCO, charge-pump, and phase detectors. Technical proficiency is required in IC design CAD tools including Spectre, SpectreRF, AMS simulator, and Matlab, along with familiarity with Verilog and SystemVerilog programming. The role also requires physical layout knowledge and lab testing skills to evaluate prototype units against specifications.

What you'll do

  • Design RF and analog PLL and clocking circuits using advanced deep-submicron CMOS technologies.
  • Develop Serdes analog PHY circuits for high-performance applications.
  • Perform system modeling and analysis for mixed-signal systems.
  • Execute design verification and provide production support tasks.
  • Collaborate with digital and software developers to meet specific system requirements.
  • Conduct lab testing to evaluate prototype units against design specifications.
  • Perform critical physical layouts based on technical requirements.

What we're looking for

  • Bachelor’s degree with 10+ years of experience, Master's with 8+ years, or PhD with 5+ years in a related field.
  • Hands-on experience designing frequency synthesizers and clock generation circuits like VCO, DCO, charge-pump, and DLL in deep sub-micron CMOS.
  • Ability to translate PLL loop system knowledge into circuit level specifications.
  • Strong knowledge of IC design CAD tools including Spectre, SpectreRF, AMS simulator, and Matlab.
  • Familiarity with Verilog and SystemVerilog programming.
  • Thorough understanding of physical layout requirements and ability to perform critical layouts.
  • Lab testing skills to evaluate prototype units against design specifications.
  • Excellent communication and presentation skills in a dynamic team environment.

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