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Digital Hardware Design Schematic Capture PCB Layout FPGA Embedded Processors PCIe DDR3 DDR4 SDRAM JESD UART SPI 1000BASE-T Mentor Graphic’s Git ClearCase Confluence Logic Analyzers BERTs Signal Intelligence Machine Learning Image Processing +17 more Show less

Laser Physics Optics Photonics Zemax OpticStudio Optical Modeling Laser System Design Beam Delivery Optomechanical Design Data Analysis Verification and Validation Laser Safety +6 more Show less

RF Package Design RF Circuit Design Ansys HFSS ADS Hspice Cadence Allegro Mentor Xpedition MatLab Python C++ Perl Electromagnetics Transmission Line Theory Crosstalk +9 more Show less

PCBA Design Schematic Capture PCB Layout LTspice Xpedition Altium Designer FPGA SoC Signal Integrity Power Integrity EMC PCIe Ethernet SRIO DDR SPI I2C iBert Oscilloscope Logic Analyzer Spectrum Analyzer DFMEA HALT ALT MTBF +20 more Show less

SoC RTL Verilog HDL SystemVerilog ARM PCIe DDR LPDDR HBM UCIe Ethernet Python Perl UVM OVM CDC Linting Synthesis DFT +14 more Show less

Physical Design Flow SoC Floor Planning Clock Tree Synthesis Place and Route PDN Timing Analysis LVS DRC DDR Micro-architecture Algorithm Design Modeling Tapeout +9 more Show less

SoC RTL Verilog HDL SystemVerilog ARM PCIe DDR LPDDR HBM UCIe Ethernet Python Perl UVM OVM CDC Linting Synthesis DFT +14 more Show less

CAD VLSI Portable Stimulus Simulation Emulation Digital IC Design Verification Methodologies Design Specifications RF Analog Foundry Process Technology +6 more Show less

PCB Layout Signal Integrity FPGA Xilinx Altera Vivado Quartus HyperLynx Sigrity PowerSI Ansys HFSS SPICE Mentor Graphics DxDesigner Python Perl Linux Unix PCIe DDR3 DDR4 DDR5 SERDES I2C JTAG UART SPI HDL DFM DFT +23 more Show less

SystemVerilog UVM Verilog VHDL Python C++ C Perl Formal Verification UPF AMBA AXI AHB APB ASIC Design RTL Object-oriented programming Automation +13 more Show less

RF Design RFIC PLL LNA Mixers PA Schematic Capture PCB Layout EMI AWR Microwave Office Altium RF Simulation Hardware Development Multi-GHz MANET MIMO +11 more Show less

Verilog RTL SystemVerilog UVM OVM SoC Architecture Applied Cryptography Secure Boot Key Management AXI AHB Python Perl TCL UPF CDC RDC LINT Timing Analysis Synthesis Hardware Root of Trust +15 more Show less

Verilog RTL SystemVerilog UVM OVM SoC Architecture Applied Cryptography Secure Boot Key Management AXI AHB Python Perl TCL UPF CDC RDC LINT Timing Analysis Synthesis Hardware Root of Trust +15 more Show less

ASIC Design RTL UVM System C DPI-C DFT Formal Verification Matlab CMOS Low Power Design Digital Design Verification Test Bench +7 more Show less