Senior or Staff Hardware System Design Engineer

Qualcomm

Confirmed live yesterday High trust

Quick summary

Work type: On-site
Location: San Diego, CA
Salary: $115,600–$173,400 / yr
Posted: 10 days ago
Freshness: Confirmed live yesterday
Closes: Feb 28, 2027
Nearby: 99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $191k

This role $144k

$103k most similar roles pay here $231k

This role pays less than 86% of similar roles. Most pay $165,200–$216,250 — the shaded band above. At the midpoint, this role pays about $144k versus about $191k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 623 open roles on FindRole.

Listed pay typically runs $148,300–$222,500 across 603 roles with salary data.

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At a glance

TL;DR · Senior or Staff Hardware System Design Engineer

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Hardware System Design Engineer, Senior or Staff joins a hardware design team building high-performance FPGA-based emulation platforms. The role involves owning the full board design lifecycle, including schematic capture, PCB stack-up for 26+ layers, layout, and BOM management. You will drive system-level architecture in collaboration with customers and software teams while performing power and signal integrity simulations for 10 Gbps+ SERDES and high-speed I/O. Key responsibilities include FPGA board design for Xilinx or Altera, managing DDR memory subsystems, and directing lab technicians during system bring-up and debug. Required skills include proficiency in tools like Vivado, Quartus, HyperLynx, and Ansys HFSS, alongside knowledge of I2C, JTAG, PCIe, and eMMC protocols. You will solve complex hardware challenges by ensuring designs are optimized for signal integrity, manufacturability, and reliability across multi-board systems.

Skills

Signal Integrity FPGA Xilinx Altera HDL SERDES DDR3 DDR4 DDR5 I2C JTAG UART SPI PCIe eMMC Linux Mentor Graphics DxDesigner Vivado Quartus HyperLynx Sigrity PowerSI PowerDC ADS Ansys HFSS SPICE Python Perl

What you'll do

Own the full board design lifecycle including schematic capture, 26+ layer PCB layout, BOM management, and verification testing.
Drive system-level architecture in collaboration with customers, software teams, and firmware development teams.
Perform power and signal integrity simulations for high-speed 10 Gbps+ SERDES and other high-speed I/O.
Lead the design of FPGA boards featuring Xilinx or Altera components and DDR memory subsystems.
Direct lab technicians through system installation, bring-up, and root-cause investigation of complex hardware issues.
Collaborate with manufacturing and mechanical teams to ensure designs meet DFM and reliability standards.
Author technical documentation including pinout tables, design review packages, and internal hardware design documents.
Serve as the primary technical point of contact for customers regarding system architecture decisions and trade-offs.

What we're looking for

Bachelor's or Master's degree in Electrical/Electronics Engineering, Computer Engineering, or a related field.
5+ years of experience in system architecture, hardware board design, and signal integrity simulations are required.
10+ years of experience are typically expected for consideration at the Staff level.
Experience with high-speed board design including 26+ layer PCB stack-ups, 10 Gbps+ SERDES, and DDR3/DDR4/DDR5 memory subsystems.
Proficiency in power and signal integrity simulations using tools like HyperLynx, Sigrity, ADS, or Ansys HFSS.
Experience with FPGA board design (Xilinx/Altera) and FPGA HDL coding.
Familiarity with protocols such as I2C, JTAG, UART, SPI, PCIe, and eMMC.
Proficiency with test equipment including oscilloscopes, logic analyzers, and protocol analyzers.

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