Design Verification Engineer
Qualcomm
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How this pay compares to similar roles
This role pays less than 88% of similar roles. Most pay $170,000–$216,250 — the shaded band above. At the midpoint, this role pays about $144k versus about $193k for comparable roles.
Based on 240 similar postings.
Employer
Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.
Qualcomm currently has 623 open roles on FindRole.
Listed pay typically runs $148,300–$222,500 across 603 roles with salary data.
Most-posted roles
At a glance
ASICS Design Verification Engineer-Senior joins the ASICS Engineering team to manage the complete verification lifecycle from system-level concept through tape out and post-silicon support. The role focuses on comprehensive pre-silicon test planning for digital power IP, where the engineer will develop testbenches, coverage models, assertion models, and formal verification property checking. Additionally, the position involves deploying power-aware UPF verification flows and developing automation to improve overall efficiency. Key technical requirements include proficiency in SystemVerilog, UVM, Verilog, VHDL, and C or C++ programming. Candidates should possess skills in Perl or Python scripting and knowledge of AMBA Bus protocols like AXI, AHB, and APB. The work centers on solving complex verification challenges for digital power IP within the semiconductor space to ensure robust hardware functionality before production.
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